A Power Reduction technique for Flash analog-to-digital converter - Ahmed, Gulrej;Kurmi, Umashankar
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The primary objective of this book is to showcase a new high performance comparator for low-power application of Flash ADC. Moreover, by employing the proposed comparator, the designed Flash ADCs get rid of power hungry reference-ladder network. The secondary objective is to propose a novel power reduction technique for high-speed Flash ADC, which examines the inactive comparators in the Flash ADC and disables them to save the unnecessary power consumption.

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Produktbeschreibung
The primary objective of this book is to showcase a new high performance comparator for low-power application of Flash ADC. Moreover, by employing the proposed comparator, the designed Flash ADCs get rid of power hungry reference-ladder network. The secondary objective is to propose a novel power reduction technique for high-speed Flash ADC, which examines the inactive comparators in the Flash ADC and disables them to save the unnecessary power consumption.
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Autorenporträt
Dr. Gulrej Ahmed is working as an associate professor at Manipal University Jaipur, Rajasthan.Dr. Umashankar Kurmi is working as an assistant professor at LNCT, Bhopal.