Srikanth Vijayaraghavan, Meyyappan Ramanathan

A Practical Guide for SystemVerilog Assertions

• Gebundenes Buch

Produktbeschreibung

SystemVerilog language consists of three very specific areas of constructs -- design, assertions and testbench.Assertions add a whole new dimension to the ASIC verification process. Assertions provide a better way to do verification proactively.Traditionally, engineers are used to writing verilog test benches that help simulate their design.Verilog is a procedural language and is very limited in capabilities to handle the complex Asic's built today.SystemVerilog assertions (SVA) are a declarative and temporal language that provides excellent control over time and parallelism. This provides the designers a very strong tool to solve their verification problems.While the language is built solid, the thinking is very different from the user's perspective when compared to standard verilog language. The concept is still very new and there is not enough expertise in the field to adopt this methodology and be successful. While the language has been defined very well, there is no practical guide that shows how to use the language to solve real verification problems. This book will be the practical guide that will help people to understand this new methodology.

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Produktdetails

• Integrated Circuits and Systems
• Verlag: Springer, Berlin
• Artikelnr. des Verlages: 978-0-387-26049-5
• 2005 edition
• Seitenzahl: 334
• Erscheinungstermin: 21. Juni 2005
• Englisch
• Abmessung: 242mm x 167mm x 27mm
• Gewicht: 752g
• ISBN-13: 9780387260495
• ISBN-10: 0387260498
• Artikelnr.: 15079016

Autorenporträt

Srikanth Vijayaraghavan, Synopsys Inc., Mountain View, CA, USA / Meyyappan Ramanathan, Synopsys Inc., Mountain View, CA, USA

Inhaltsangabe

Foreword.- Preface.- Introduction to SVA.- Advanced ABV Methodology.- ABV for Finite State machines (FSM).- ABV for data intensive designs.- ABV for memories.- ABV for Simple serial applications.- ABV for complex bus protocols.- Index.

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Assertion Based Verification.- to SVA.- SVA Simulation Methodology.- SVA for Finite State Machines.- SVA for Data Intensive Designs.- SVA for Memories.- SVA for Protocol Interface.- Checking the Checker.