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Wearable and embedded wireless sensor platforms are
often highly constrained in size and power
consumption in order to operate in unintrusive ways.
To meet these constraints, the memory is kept as
small as possible to reduce area and power, but at
the same time it poses new challenges on programming.
To address these problems,
this book proposes
(1) a framework for synthesis of host-assisted
scripting engines,
(2) a minimum-overhead yet powerful runtime system
based on
recursive threaded code, and
(3) a host-assisted memory optimization technique
that exploits high-level knowledge in models of
computation.
The benefits are three-fold:
first, the interactive access between programmer and
embedded system improves productivity of programmers.
Second, the low runtime overhead and memory
requirements enable this runtime system to run on
compact platforms while providing
high flexibility and composability. Third, a new
memory optimization scheme combined with the
dispatching structure exposes regularity
of dataflow models to enable memory and scheduling
optimizations, sometimes in ways better than manual
coding.
often highly constrained in size and power
consumption in order to operate in unintrusive ways.
To meet these constraints, the memory is kept as
small as possible to reduce area and power, but at
the same time it poses new challenges on programming.
To address these problems,
this book proposes
(1) a framework for synthesis of host-assisted
scripting engines,
(2) a minimum-overhead yet powerful runtime system
based on
recursive threaded code, and
(3) a host-assisted memory optimization technique
that exploits high-level knowledge in models of
computation.
The benefits are three-fold:
first, the interactive access between programmer and
embedded system improves productivity of programmers.
Second, the low runtime overhead and memory
requirements enable this runtime system to run on
compact platforms while providing
high flexibility and composability. Third, a new
memory optimization scheme combined with the
dispatching structure exposes regularity
of dataflow models to enable memory and scheduling
optimizations, sometimes in ways better than manual
coding.