Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages.
Systematic introduction to key model order reduction techniques in linear circuits, using real-world examples to illustrate advantages and disadvantages.Hinweis: Dieser Artikel kann nur an eine deutsche Lieferadresse ausgeliefert werden.
Sheldon X.-D. Tan is an associate professor in the Department of Electrical Engineering, and cooperative faculty member in the Department of Computer Science and Engineering, at the University of California, Riverside. He received his PhD in electrical and computer engineering in 1999 from the University of Iowa, Iowa City. His current research interests focus on design automation for VLSI integrated circuits. Lei He is an associate professor in the Department of Electrical Engineering at the University of California, Los Angeles, where he was also awarded his PhD in computer science in 1999. His current research interests include computer-aided design of VLSI circuits and systems.
Inhaltsangabe
List of figures List of tables Preface 1. Introduction 2. Projection-based model order reduction algorithms 3. Truncated balanced realization methods for model order reduction 4. Passive balanced truncation of linear systems in descriptor form 5. Passive hierarchical model order reduction 6. Terminal reduction of linear dynamic circuits 7. Vector potential equivalent circuit for inductance modeling 8. Structure-preserving model order reduction 9. Block structure-preserving reduction for RLCK circuits 10. Model optimization and passivity enforcement 11. General multi-port circuit realization 12. Model order reduction for multi-terminal linear dynamic circuits 13. Passive modeling by signal waveform shaping References Index.
List of figures List of tables Preface 1. Introduction 2. Projection-based model order reduction algorithms 3. Truncated balanced realization methods for model order reduction 4. Passive balanced truncation of linear systems in descriptor form 5. Passive hierarchical model order reduction 6. Terminal reduction of linear dynamic circuits 7. Vector potential equivalent circuit for inductance modeling 8. Structure-preserving model order reduction 9. Block structure-preserving reduction for RLCK circuits 10. Model optimization and passivity enforcement 11. General multi-port circuit realization 12. Model order reduction for multi-terminal linear dynamic circuits 13. Passive modeling by signal waveform shaping References Index.
Es gelten unsere Allgemeinen Geschäftsbedingungen: www.buecher.de/agb
Impressum
www.buecher.de ist ein Internetauftritt der buecher.de internetstores GmbH
Geschäftsführung: Monica Sawhney | Roland Kölbl | Günter Hilger
Sitz der Gesellschaft: Batheyer Straße 115 - 117, 58099 Hagen
Postanschrift: Bürgermeister-Wegele-Str. 12, 86167 Augsburg
Amtsgericht Hagen HRB 13257
Steuernummer: 321/5800/1497
