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Architectures for RF Frequency Synthesizers

• Broschiertes Buch

Produktbeschreibung

Frequency synthesizers are an essential building block of RF communication products. They can be found in traditional consumer products, in personal communication systems, and in optical communication equipment. Since frequency synthesizers are used in many different applications, different performance aspects may need to be considered in each case. The main body of the text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. The analysis of the PLL properties is performed with the use of the open-loop bandwidth and phase margin concepts, to enable the influence of higher-order poles to be taken into account from the beginning of the design process. The theoretical system analysis is complemented by descriptions of innovative system and building block architectures, by circuit implementations in bipolar and CMOS technologies, and by measurement results. Architectures for RF Frequency Synthesizers contains basic information for the beginner as well as in-depth knowledge for the experienced designer. It is widely illustrated with practical design examples used in industrial products.

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Produktdetails

• The Springer International Series in Engineering and Computer Science Vol.693
• Verlag: Springer / Springer US / Springer, Berlin
• Artikelnr. des Verlages: 978-1-4419-5293-6
• Softcover reprint of the original 1st ed. 2002
• Seitenzahl: 280
• Erscheinungstermin: 14. Dezember 2011
• Englisch
• Abmessung: 235mm x 155mm x 16mm
• Gewicht: 429g
• ISBN-13: 9781441952936
• ISBN-10: 1441952934
• Artikelnr.: 32110403

Inhaltsangabe

Tuning System Specifications.- Single-Loop Architectures.- Wide-Band Tuning System Architectures.- Adaptive PLL Architecture Combining High Spectral Purity and Fast Settling Time.- Architecture and Circuit Design of Programmable Dividers.- Conclusions.

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Foreword. Preface. List of Acronyms. List of Symbols.
1. Introduction.
2. Tuning System Specifications.
3. Single-Loop Architectures.
4. Wide-Band Architectures.
5. Adaptive PLL Architecture.
6. Programmable Dividers.
7. Conclusions.
A. PLL Stability Limits Due to the Discrete-Time PFD/CP Operation.
B. Clock-Conversion PLLs for Optical Transmitters.
About the Author. Index.