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We document efforts to assemble and modify a set of benchmark circuits for testing a new class of circuit partitioning algorithms designed for heterogeneous FPGAs. Often, computations can be implemented using different types of resources within these devices; the new partitioning algorithms incorporate the circuit mapping step, where computations are mapped to specific resource types, into the partitioning algorithms themselves. We elaborate on the details of this new form of partitioning, called "multi-personality" partitioning. While remapping provides a great deal of flexibility to the…mehr

Produktbeschreibung
We document efforts to assemble and modify a set of benchmark circuits for testing a new class of circuit partitioning algorithms designed for heterogeneous FPGAs. Often, computations can be implemented using different types of resources within these devices; the new partitioning algorithms incorporate the circuit mapping step, where computations are mapped to specific resource types, into the partitioning algorithms themselves. We elaborate on the details of this new form of partitioning, called "multi-personality" partitioning. While remapping provides a great deal of flexibility to the partitioner to modify the implementation of circuit nodes in order to meet the desired partitioning criteria, testing this new partitioner requires large, heterogeneous netlists. In this work, we develop a list of requirements for the needed benchmarks, investigate existing benchmarks to determine their suitability, and document how we adapt the chosen benchmarks for use in testing multi-personality partitioning algorithms. Finally, we also discuss initial efforts in assembling and developing a set of benchmarks for testing a new form of partitioning called content-aware circuit partitioning.
Autorenporträt
Aman Chadha pursued his M.S. in Computer Engineering (with a specialization in Computer Architecture) from the University of Wisconsin-Madison, where he was conferred the Outstanding International Graduate Student Award in 2014. His interests include Computer Architectural Systems, Image Processing and Processor Microarchitecture.