This book introduces readers to the potential of charge-sharing (CS) successive approximation register (SAR) analog-to-digital converters (ADCs), while providing extensive analysis of the factors that limit the performance of the CS topology. The authors present guidelines and useful techniques for mitigating the limitations of the architecture, while focusing on the implementation under restricted power budgets and voltage supplies.
This book introduces readers to the potential of charge-sharing (CS) successive approximation register (SAR) analog-to-digital converters (ADCs), while providing extensive analysis of the factors that limit the performance of the CS topology. The authors present guidelines and useful techniques for mitigating the limitations of the architecture, while focusing on the implementation under restricted power budgets and voltage supplies.
Taimur Rabuske was born in Rio Grande do Sul, Brazil. He received the B.Sc. and M.Sc. degrees in Electrical Engineering and Computer Sciences from Universidade Federal de Santa Maria (UFSM), Brazil, in 2009 and 2011, respectively, and the Ph.D. degree (with distinction and honour) in Electrical and Computer Engineering from Instituto Superior Técnico, Portugal, in 2016. From July to December 2009, he was an intern at Gwangju Institute of Science and Technology (GIST), South Korea, and from July 2010 to June 2016 he was a research assistant at INESC-ID, Lisbon, Portugal. His current research interests include design and optimization of RF, analog and mixed-signal circuits, data converters, techniques for ultra-low power and design methodologies. Jorge Fernandes was born in Lisbon in 1966. He received the Degree in electrical engineering from the Instituto Superior Técnico (IST), Universidade de Lisboa, Portugal, in 1989, and the M.Sc., Ph.D., and Habilitation degrees fromthe same university in 1993, 2000, and 2010, respectively. He joined the teaching staff of the Department of Electrical Engineering at IST, in 1989, and has been with the Analog and Mixed-Mode Circuits Group, INESC-ID Lisboa, since 1989. He was a Visiting Scholar with the Delft University of Technology, Delft, The Netherlands, in 2000, and Columbia University, New York, USA, in 2008. His current research interests include analog, mixed signal and RF circuits, with an emphasis on autonomous sensor circuits and low-power RF frontends. Dr. Fernandes has been a member of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems Society since 2006 and CASS representative on IEEE Technical Committee on RFID since 2015. He was the General Co-chair of the International Symposium on Circuits and Systems (ISCAS) in 2015.
Inhaltsangabe
Introduction.- ADCs for Low Voltage Low Power Applications.- Review of SAR ADC Switching Schemes.- Analysis of the charge sharing SAR ADC topology.- Techniques for Low Voltage Low Power CS SAR ADCs.- Noise-aware comparator optimization.- CS ADCs with MOSCAP-based DACs.- Design and Implementation of two Low-Voltage SAR ADCs.- Conclusion.
Introduction.- ADCs for Low Voltage Low Power Applications.- Review of SAR ADC Switching Schemes.- Analysis of the charge sharing SAR ADC topology.- Techniques for Low Voltage Low Power CS SAR ADCs.- Noise-aware comparator optimization.- CS ADCs with MOSCAP-based DACs.- Design and Implementation of two Low-Voltage SAR ADCs.- Conclusion.
Introduction.- ADCs for Low Voltage Low Power Applications.- Review of SAR ADC Switching Schemes.- Analysis of the charge sharing SAR ADC topology.- Techniques for Low Voltage Low Power CS SAR ADCs.- Noise-aware comparator optimization.- CS ADCs with MOSCAP-based DACs.- Design and Implementation of two Low-Voltage SAR ADCs.- Conclusion.
Introduction.- ADCs for Low Voltage Low Power Applications.- Review of SAR ADC Switching Schemes.- Analysis of the charge sharing SAR ADC topology.- Techniques for Low Voltage Low Power CS SAR ADCs.- Noise-aware comparator optimization.- CS ADCs with MOSCAP-based DACs.- Design and Implementation of two Low-Voltage SAR ADCs.- Conclusion.
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