Main description:
The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model in favor of multi-core microprocessors--chips that combine two or more processors in a single package. In the fourth edition of Computer Architecture, the authors focus on this historic shift, increasing their coverage of multiprocessors and exploring the most effective ways of achieving parallelism as the key to unlocking the power of multiple processor architectures. Additionally, the new edition has expanded and updated coverage of design topics beyond processor performance, including power, reliability, availability, and dependability.
Increased coverage on achieving parallelism with multiprocessors.
Case studies of latest technology from industry including the Sun Niagara Multiprocessor, AMD Opteron, and Pentium 4.
Three review appendices, included in the printed volume, review the basic and intermediate principles the main text relies upon.
Eight reference appendices, collected on the CD, cover a range of topics including specific architectures, embedded systems, application specific processors--some guest authored by subject experts.
Review quote:
If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach, 4th Edition. You need one. Tours leave on the hour. Robert Colwell, Intel lead designer
The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of
covering most of the major architectural approaches employed today. William Wong, Electronic Design, November 2006
Table of contents:
Main Text
Chapter 1: Fundamentals of Computer Design
Chapter 2: Instruction-level Parallelism and its Exploitation
Chapter 3: Advanced Techniques for Exploiting Instruction-level Parallelism and their Limits
Chapter 4: Multiprocessors and Thread-level Parallelism
Chapter 5: Memory Hierarchy Design
Chapter 6: Storage Systems
Appendix A: Pipelining: Basic and Intermediate
Concepts
Appendix B: Instruction Set Principles and Examples
Appendix C: Introduction to Memory Hierarchy
CD
Appendix D: Embedded Systems (contributor: Thomas M. Conte, North Carolina State University)
Appendix E: Interconnection Networks (contributor: Timothy M. Pinkston, USC and Jose Duato, Simula)
Appendix F: Vector Processors (contributor: Krste Asanovic, MIT)
Appendix G: Hardware and Software for VLIW and EPIC
Appendix H: Large-Scale Multiprocessors and Scientific Apps
Appendix I: Computer Arithmetic (contributor: David Goldberg, Xerox PARC)
Appendix J: Survey of Instruction Set Architectures
Appendix K: Historical Perspectives with References
The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model in favor of multi-core microprocessors--chips that combine two or more processors in a single package. In the fourth edition of Computer Architecture, the authors focus on this historic shift, increasing their coverage of multiprocessors and exploring the most effective ways of achieving parallelism as the key to unlocking the power of multiple processor architectures. Additionally, the new edition has expanded and updated coverage of design topics beyond processor performance, including power, reliability, availability, and dependability.
Increased coverage on achieving parallelism with multiprocessors.
Case studies of latest technology from industry including the Sun Niagara Multiprocessor, AMD Opteron, and Pentium 4.
Three review appendices, included in the printed volume, review the basic and intermediate principles the main text relies upon.
Eight reference appendices, collected on the CD, cover a range of topics including specific architectures, embedded systems, application specific processors--some guest authored by subject experts.
Review quote:
If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach, 4th Edition. You need one. Tours leave on the hour. Robert Colwell, Intel lead designer
The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of
covering most of the major architectural approaches employed today. William Wong, Electronic Design, November 2006
Table of contents:
Main Text
Chapter 1: Fundamentals of Computer Design
Chapter 2: Instruction-level Parallelism and its Exploitation
Chapter 3: Advanced Techniques for Exploiting Instruction-level Parallelism and their Limits
Chapter 4: Multiprocessors and Thread-level Parallelism
Chapter 5: Memory Hierarchy Design
Chapter 6: Storage Systems
Appendix A: Pipelining: Basic and Intermediate
Concepts
Appendix B: Instruction Set Principles and Examples
Appendix C: Introduction to Memory Hierarchy
CD
Appendix D: Embedded Systems (contributor: Thomas M. Conte, North Carolina State University)
Appendix E: Interconnection Networks (contributor: Timothy M. Pinkston, USC and Jose Duato, Simula)
Appendix F: Vector Processors (contributor: Krste Asanovic, MIT)
Appendix G: Hardware and Software for VLIW and EPIC
Appendix H: Large-Scale Multiprocessors and Scientific Apps
Appendix I: Computer Arithmetic (contributor: David Goldberg, Xerox PARC)
Appendix J: Survey of Instruction Set Architectures
Appendix K: Historical Perspectives with References
"What has made this book an enduring classic is that each edition is not an update, but an extensive revision that presents the most current information and unparalleled insight into this fascinating and fast changing field. For me, after over twenty years in this profession, it is also another opportunity to experience that student-grade admiration for two remarkable teachers." --From the Foreword by Luiz Andre Barroso, Google, Inc.