This book constitutes the thoroughly refereed conference proceedings of the 16th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2023, held in Toulouse, France in January 2023. The 9 full included in the volume were carefully reviewed and selected from 17 submissions. They are organized in the following topical sections: Methods and Applications, Hardware Architectures and Implementations and others.
This book constitutes the thoroughly refereed conference proceedings of the 16th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2023, held in Toulouse, France in January 2023.
The 9 full included in the volume were carefully reviewed and selected from 17 submissions. They are organized in the following topical sections: Methods and Applications, Hardware Architectures and Implementations and others.
Methods and Applications.- SCAPE: HW-Aware Clustering of Data ow Actors for Tunable Scheduling Complexity.-Deep Recurrent Neural Network performing spectral recurrence on hyperspectral images for brain tissue classi cation.- Brain blood vessel segmentation in hyperspectral images through linear operators.- Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes.- Hardware Architectures and Implementations.- AINoC: new interconnect for future Deep Neural Network accelerators.- Real-time FPGA implementation of the Semi-Global Matching stereo vision algorithm for an 4K/UHD video stream.- TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing Adaptive Inference for FPGA-based 5G Automatic Modulation.- Classfication.- High-Level Online Power Monitoring of FPGA IP Based on Machine Learning.
Methods and Applications.- SCAPE: HW-Aware Clustering of Data ow Actors for Tunable Scheduling Complexity.-Deep Recurrent Neural Network performing spectral recurrence on hyperspectral images for brain tissue classi cation.- Brain blood vessel segmentation in hyperspectral images through linear operators.- Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes.- Hardware Architectures and Implementations.- AINoC: new interconnect for future Deep Neural Network accelerators.- Real-time FPGA implementation of the Semi-Global Matching stereo vision algorithm for an 4K/UHD video stream.- TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing Adaptive Inference for FPGA-based 5G Automatic Modulation.- Classfication.- High-Level Online Power Monitoring of FPGA IP Based on Machine Learning.
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