Design and Architectures for Signal and Image Processing

17th International Workshop, DASIP 2024, Munich, Germany, January 17¿19, 2024, Proceedings
Herausgegeben:Dias, Tiago; Busia, Paola

• Broschiertes Buch

Produktbeschreibung

This book constitutes the refereed proceedings of the 17th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2024, held in Munich, Germany, during January 17-19, 2024.

The 9 full papers presented in this book were carefully reviewed and selected from 21 submissions. The workshop provided an inspiring international forum for the latest innovations and developments in the fields of leading signal, image, and video processing and machine learning in custom embedded, edge, and cloud computing architectures and systems.

Produktdetails

• Lecture Notes in Computer Science 14622
• Verlag: Springer / Springer Nature Switzerland / Springer, Berlin
• Artikelnr. des Verlages: 978-3-031-62873-3
• 2024
• Seitenzahl: 140
• Erscheinungstermin: 22. Juni 2024
• Englisch
• Abmessung: 235mm x 155mm x 8mm
• Gewicht: 225g
• ISBN-13: 9783031628733
• ISBN-10: 303162873X
• Artikelnr.: 70606361

Inhaltsangabe

.- Specialized Hardware Architectures for Signal and Image Processing.

.- A Highly Configurable Platform for Advanced PPG Analysis.

.- sEMG-based Gesture Recognition with Spiking Neural Networks on Low-power FPGA.

.- Scalable FPGA Implementation of Dynamic Programming for Optimal Control of Hybrid Electrical Vehicles.

.- Optimization Approaches for Efficient Deployment of Signal and Image Processing Applications.

.- Wordlength Optimization for Custom Floating-point Systems.

.- An Initial Framework for Prototyping Radio-Interferometric Imaging Pipelines.

.- Scratchy: A Class of Adaptable Architectures with Software-Managed Communication For Edge Streaming Applications.

.- Digital Signal Processing Design for Reconfigurable Systems.

.- Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications.

.- Improving the Energy Efficiency of CNN Inference on FPGA using Partial Reconfiguration.

.- Optimising Graph Representation for Hardware Implementation of Graph Convolutional Networks for Event-based Vision.