Design and Development of Network Protocol in FPGA - Dembrani, Mahesh;Patel, Vinit;Jayaswal, Anupkumar
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The increasing popularity of the Internet stimulates an explosive growth of the data transmitted on the Internet as well as the dramatic increase of the transmission speeds. As a result the TCP/IP processing has become a bottleneck. Traditional software based TCP/IP processing on general purpose processors (GPPs) is no longer able to keep pace with network wire speeds. Consequently, there is an urgent need to design performance-critical TCP/IP functions as special units to accelerate the processing speeds and to offload the processing tasks from GPPs. Such functional units performing…mehr

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Produktbeschreibung
The increasing popularity of the Internet stimulates an explosive growth of the data transmitted on the Internet as well as the dramatic increase of the transmission speeds. As a result the TCP/IP processing has become a bottleneck. Traditional software based TCP/IP processing on general purpose processors (GPPs) is no longer able to keep pace with network wire speeds. Consequently, there is an urgent need to design performance-critical TCP/IP functions as special units to accelerate the processing speeds and to offload the processing tasks from GPPs. Such functional units performing micro-level functions can be implemented on field - programmable gate arrays (FPGAs.) FPGAs as programmable hardware devices are particularly suitable to encompass both high processing speeds and flexibility to meet the quickly changing Internet. A challenge in designing the TCP/IP function is that the demand for advanced services requires the network devices to support a wide range of application and protocols; however this application and protocols are constantly evolving.
Autorenporträt
Mahesh Dembrani está a trabalhar no RCPIT. As suas áreas de interesse incluem IOT, ML, Processamento de Sinal, Processamento de Imagem em aplicações de cuidados de saúde.