19,99 €
inkl. MwSt.
Versandfertig in 6-10 Tagen
10 °P sammeln
Andere Kunden interessierten sich auch für
![ASIC Implementation of Pezaris Multiplier in DIT FFT Architectures]( "ASIC Implementation of Pezaris Multiplier in DIT FFT Architectures")
ASIC Implementation of Pezaris Multiplier in DIT FFT Architectures26,99 €![Vedic Mathematics & its Significance]( "Vedic Mathematics & its Significance")
Vedic Mathematics & its Significance26,99 €![Design of Fast,Low Power 16-bit Multiplier using Vedic Mathematics]( "Design of Fast,Low Power 16-bit Multiplier using Vedic Mathematics")
Design of Fast,Low Power 16-bit Multiplier using Vedic Mathematics38,99 €![Design of High Speed 32-Bit Floating Point FFT Processor using FPGA]( "Design of High Speed 32-Bit Floating Point FFT Processor using FPGA")
Design of High Speed 32-Bit Floating Point FFT Processor using FPGA26,99 €![Implementation of a Binary Floating Point Fused Multiply-Add Unit]( "Implementation of a Binary Floating Point Fused Multiply-Add Unit")
Implementation of a Binary Floating Point Fused Multiply-Add Unit32,99 €![FFT / IFFT Architectures Using Fused Floating-point Operations]( "FFT / IFFT Architectures Using Fused Floating-point Operations")
FFT / IFFT Architectures Using Fused Floating-point Operations44,99 €![Frequency-domain analysis of discrete-time signals and design of Infinite-Impulse Response (IIR) and Finite-Impulse Response (FIR) filters]( "Frequency-domain analysis of discrete-time signals and design of Infinite-Impulse Response (IIR) and Finite-Impulse Response (FIR) filters")
Frequency-domain analysis of discrete-time signals and design of Infinite-Impulse Response (IIR) and Finite-Impulse Response (FIR) filters17,95 €
Multiplication is important operation in most of the signal processing applications.Hence,multiplier is the crucial part of signal processing applications like FIR filter,IIR filter,FFT,DFT,DCT etc.So,there is always need of a multiplier which is high speed,which consumes less area and low power.Hence performance of multiplier has direct effect on the final applications in which multipliers are used. In this book, we have tried to design optimized Vedic multiplier in HDL which can give good delay and area performance.As FIR,IIR filter have their coefficient in fraction,we have designed the multiplier in single precision floating point format. Hence,accuracy and range of multiplication coefficient is more. The Vedic multiplier is further used in FIR filer,IIR filter and Haar Wavelet transform as a basic building block.Also,it is compared with FIR filter,IIR filter and Haar Wavelet transform using other multipliers, such as Shift and Add multiplier,Array multiplier,and Wallace multiplier based on delay and area performance.