Andere Kunden interessierten sich auch für
![The Dynamic Vedic Multiplier Implemented in FPGA for DSP applications]( "The Dynamic Vedic Multiplier Implemented in FPGA for DSP applications")
The Dynamic Vedic Multiplier Implemented in FPGA for DSP applications35,99 €![Low Power High Speed Switch Mode Power Supply]( "Low Power High Speed Switch Mode Power Supply")
Low Power High Speed Switch Mode Power Supply36,99 €![Speed Reading Training]( "Speed Reading Training")
Speed Reading Training40,99 €![Low Power and Efficient Multiplier for RSA Cryptosystems]( "Low Power and Efficient Multiplier for RSA Cryptosystems")
Low Power and Efficient Multiplier for RSA Cryptosystems26,99 €![Reversible Data Hiding Techniques]( "Reversible Data Hiding Techniques")
Reversible Data Hiding Techniques40,99 €![OBTURATION TECHNIQUES]( "OBTURATION TECHNIQUES")
OBTURATION TECHNIQUES40,99 €![]()
"Elip-Marc" Learning Activity to Improve Students Mathematic Reasoning57,99 €
This Book presents the Concept of Vedic mathematics. It is an ancient system of mathematics which has a unique technique of calculations based on sutras. Mainly the multiplier sutras are Urdhva-tiryagbhyam, Nikhilam Navatashcaramam Dashatah and Anurupye are used for the High speed calculation.It also deals with various branches of mathematics like arithmetic algebra. The design of efficient high speed Vedic multiplier on Vedic mathematics techniques is achieved. Speed, computation time and Hardware requirements for designing multiplier is to be minimized after comparison of these sutras. So the design complexity gets reduced for both small and large no of bits, modularity gets increased and applicable to all cases of multiplication.
Hinweis: Dieser Artikel kann nur an eine deutsche Lieferadresse ausgeliefert werden.
Hinweis: Dieser Artikel kann nur an eine deutsche Lieferadresse ausgeliefert werden.