Andere Kunden interessierten sich auch für
![Design for High Performance, Low Power, and Reliable 3D Integrated Circuits]( "Design for High Performance, Low Power, and Reliable 3D Integrated Circuits")
Design for High Performance, Low Power, and Reliable 3D Integrated Circuits111,99 €![Disruptive Logic Architectures and Technologies]( "Disruptive Logic Architectures and Technologies")
Disruptive Logic Architectures and Technologies74,99 €![Designing 2D and 3D Network-on-Chip Architectures]( "Designing 2D and 3D Network-on-Chip Architectures")
Designing 2D and 3D Network-on-Chip Architectures74,99 €![Compact Models and Measurement Techniques for High-Speed Interconnects]( "Compact Models and Measurement Techniques for High-Speed Interconnects")
Compact Models and Measurement Techniques for High-Speed Interconnects37,99 €![3D Stacked Chips]( "3D Stacked Chips")
3D Stacked Chips37,99 €![Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach]( "Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach")
Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach95,99 €![Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach]( "Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach")
Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach66,99 €
This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits. It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks. Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors anda oorplan are available. Finally, the authors explore the use of Carbon Nanotubes for power grid design as a futuristic alternative to Copper.