Implementations of theoretically secure cryptographic algorithms can be broken by side-channelattacks. In particular, block ciphers have turned out to be very susceptible todifferential power-analysis (DPA) attacks. Various methods to prevent these attacks havebeen proposed so far. This book is about countermeasures against DPA attacks, whichcan be easily implemented in a standard CMOS design flow. In particular, the work focuseson the insertion of dummy operations, on the randomization of operands and on thegeneration of noise. The effectiveness and the costs of these countermeasures are analyzed.In addition, an ASIC design implementing these countermeasures is presented. The designis a strong authentication module using AES equipped with the countermeasures. Firstmeasurement results of this design based on an FPGA prototype are also part of this book. Not only researchers in the area of cryptography and security are addressed by this work but also hardware security designers.