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This work investigates efficient circuit techniques to synthesize sinusoidal signals with extremely wide programmable frequency range, from DC to the Niquist Frequency with a 100MHz system clock. The developed techniques target sensor self-testing and impedance sensing applications. Different from most existing direct digital synthesis works, which primarily target communication applications, requiring narrow frequency range but demanding small phase jitters, this work focuses on circuit techniques to achieve large programmable frequency range, high signal to noise ratio (SNR), and efficient circuit implementation. First, it develops a theoretical framework to estimate the SNR of the synthesized signals in terms of the key design parameters. Second, a novel circuit structure is developed in order to achieve large frequency range and to minimize circuit size and implementation cost. The proposed design is then implemented on a FPGA hardware platform for verification purposes.