This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits.…mehr
This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits.
Artikelnr. des Verlages: 80032341, 978-1-4419-9550-6
2014
Seitenzahl: 328
Erscheinungstermin: 22. Oktober 2013
Englisch
Abmessung: 241mm x 160mm x 22mm
Gewicht: 654g
ISBN-13: 9781441995506
ISBN-10: 1441995501
Artikelnr.: 32767378
Inhaltsangabe
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory.- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement.- Energy-Efficient Systems Using Resistive Memory Devices.- Asymmetric in STT-RAM Cell Operations.- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs.- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices.- Resistive Memories in Associative Computing.- Weal Leveling Techniques for Non-Volatile Memories.- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies.- Ferroelectric Nonvolatile Processor Design, Optimization and Application.
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory.- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement.- Energy-Efficient Systems Using Resistive Memory Devices.- Asymmetric in STT-RAM Cell Operations.- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs.- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices.- Resistive Memories in Associative Computing.- Weal Leveling Techniques for Non-Volatile Memories.- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies.- Ferroelectric Nonvolatile Processor Design, Optimization and Application.
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory.- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement.- Energy-Efficient Systems Using Resistive Memory Devices.- Asymmetric in STT-RAM Cell Operations.- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs.- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices.- Resistive Memories in Associative Computing.- Weal Leveling Techniques for Non-Volatile Memories.- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies.- Ferroelectric Nonvolatile Processor Design, Optimization and Application.
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory.- A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement.- Energy-Efficient Systems Using Resistive Memory Devices.- Asymmetric in STT-RAM Cell Operations.- An Energy-efficient 3D Stacked STTRAM Cache Architecture for CMPs.- STT-RAM Cache Hierarchy Design and Exploration with Emerging Magnetic Devices.- Resistive Memories in Associative Computing.- Weal Leveling Techniques for Non-Volatile Memories.- A Circuit-Architecture Co-optimization Framework for Exploring Non-volatile Memory Hierarchies.- Ferroelectric Nonvolatile Processor Design, Optimization and Application.
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