Energy-Efficient VLSI Architectures for Real-Time and 3D Video Processing - Schaffner, Michael Stefano Fritz
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Multiview autostereoscopic displays (MADs) make it possible to view video content in 3D without wearing special glasses, and such displays have recently become available. The main problem of MADs is that they require several (typically 8 or 9) views, while most of the 3D video content is in stereoscopic 3D today. To bridge this content-display gap, the research community started to devise automatic multiview synthesis (MVS) methods. Common MVS methods are based on depth-image-based rendering, where a dense depth map of the scene is used to reproject the image to new viewpoints. Although…mehr

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Produktbeschreibung
Multiview autostereoscopic displays (MADs) make it possible to view video content in 3D without wearing special glasses, and such displays have recently become available. The main problem of MADs is that they require several (typically 8 or 9) views, while most of the 3D video content is in stereoscopic 3D today. To bridge this content-display gap, the research community started to devise automatic multiview synthesis (MVS) methods. Common MVS methods are based on depth-image-based rendering, where a dense depth map of the scene is used to reproject the image to new viewpoints. Although physically correct, this approach requires accurate depth maps and additional inpainting steps. Our work uses an alternative conversion concept based on image domain warping (IDW) which has been successfully applied to related problems such as aspect ratio retargeting for streaming video, and dispa- rity remapping for depth adjustments in stereoscopic 3D content. IDW shows promising performance in this context as it only requires robust, sparse point- correspondences and no inpainting steps. However, MVS, using IDW as well as alternative approaches, is computationally demanding and requires realtime processing - yet such methods should be portable to end-user and even mobile devices to develop their full potential. To this end, this thesis investigates efficient algorithms and hardware architectures for a variety of subproblems arising in the MVS pipeline.
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Autorenporträt
Michael Schaffner was born in Zurich, Switzerland, in 1986. He received his BSc and MSc degrees from the Swiss Federal Institute of Technology Zurich, Switzerland, in 2009 and 2012. Since late 2012, he has been a research assistant with the Integrated Systems Laboratory and with Disney Research Zurich. His research interests include digital signal processing, video processing, and the design of very large scale integration circuits and systems. Michael Schaf- fner received the ETH Medal for his diploma thesis in 2013.