This book provides readers with a comprehensive review of the state of the art in error control for Network on Chip (NOC) links. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance.
This book provides readers with a comprehensive review of the state of the art in error control for Network on Chip (NOC) links. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance.
Artikelnr. des Verlages: 80027270, 978-1-4419-9312-0
2012
Seitenzahl: 164
Erscheinungstermin: 8. Oktober 2011
Englisch
Abmessung: 241mm x 160mm x 13mm
Gewicht: 386g
ISBN-13: 9781441993120
ISBN-10: 1441993126
Artikelnr.: 32738711
Inhaltsangabe
Introduction; Interconnect Scaling Trends; Interconnect Errors and Modeling; Networks-on-Chip; Error Control Coding Basics; Common Error Control Codes for On-Chip Interconnect; Concatenated Error Control Codes; Double-Sampling Error Control; Intermittent and Permanent Error Control; Energy-Efficient Hardware Implementation; Future Trends in Error Control.
Introduction.- Solutions to Improve the Reliability of On-Chip Interconnects.- Networks-on-Chip (NoC).- Error Control Coding for On-Chip Interconnects.- Energy Efficient Error Control Implementation.- Combining Error Control Codes with Crosstalk Reduction.
Introduction; Interconnect Scaling Trends; Interconnect Errors and Modeling; Networks-on-Chip; Error Control Coding Basics; Common Error Control Codes for On-Chip Interconnect; Concatenated Error Control Codes; Double-Sampling Error Control; Intermittent and Permanent Error Control; Energy-Efficient Hardware Implementation; Future Trends in Error Control.
Introduction.- Solutions to Improve the Reliability of On-Chip Interconnects.- Networks-on-Chip (NoC).- Error Control Coding for On-Chip Interconnects.- Energy Efficient Error Control Implementation.- Combining Error Control Codes with Crosstalk Reduction.
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