Thomas M. Conte (ed.) / Charles E. Gimarc

Fast Simulation of Computer Architectures

Herausgegeben:Conte, Thomas M.; Gimarc, Charles E.

• Gebundenes Buch

Produktbeschreibung

Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.

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Produktdetails

• Verlag: Springer / Springer US / Springer, Berlin
• Artikelnr. des Verlages: 978-0-7923-9593-5
• 1995.
• Seitenzahl: 260
• Erscheinungstermin: 30. Juni 1995
• Englisch
• Abmessung: 241mm x 160mm x 19mm
• Gewicht: 544g
• ISBN-13: 9780792395935
• ISBN-10: 079239593X
• Artikelnr.: 22762218

Inhaltsangabe

1 Introduction.- 2 Shade: A Fast Instruction-Set Simulator for Execution Profiling.- 1 Introduction.- 2 Related Work.- 3 Analyzer Interface.- 4 Implementation.- 5 Cross Shades.- 6 Performance.- 7 Conclusions.- 8 Acknowledgements.- 3 Instrumentation Tools.- 1 Introduction.- 2 When To Instrument Code.- 3 How Late Code Modification Tools are Built.- 4 Current Instrumentation Tools.- 4 Stack-Based Single-Pass Cache Simulation.- 1 Introduction.- 2 Single-Pass Cache Simulation.- 3 Extensions to Single-Pass Techniques.- 4 Concluding remarks.- 5 Non-Stack Single-Pass Simulation.- 1 Introduction.- 2 Fully-associative Cache Simulation.- 3 Binomial Forest Simulation.- 4 Write-buffer Simulation.- 5 Directions for future work.- 6 Execution Driven Simulation of Shared Memory Multiprocessors.- 1 Introduction.- 2 Implementation Decisions.- 3 Example Simulators.- 4 Code Augmentations.- 5 The Simulator Half.- 6 Performance Characteristics.- 7 Summary.- 7 Sampling for Cache and Processor Simulation.- 1 Introduction.- 2 Statistical Sampling.- 3 An Example.- 4 Concluding Remarks.- 8 Performance Bounds for Rapid Computer System Evaluation.- 1 Introduction.- 2 Outline of Approach.- 3 Simple Bounds Model.- 4 Data Dependence And Scalar CPUs.- 5 MACS: A Hierarchical Performance Model.- 6 Conclusion.