CMOS implementations of direct conversion receivers,
the architecture
most amenable to complete monolithic integration, are
hindered by the
1/f^3 noise of the local oscillator. This work
explores sources of flicker
noise generation in the cross-coupled negative
resistance oscillator
(NMOS, PMOS, and CMOS). Prior and current work in the
area of phase
noise modeling is reviewed, including the work of
Leeson, Hajimiri,
Hegazi, and others, seeking the mechanisms by which
flicker noise is
upconverted. The work of Hajimiri is extended with a
simple hardware DC estimator for the special case of LC CMOS
oscillators. A method of
adaptive control of an oscillator core is presented,
as well, using this
estimate to maintain the condition of minimum flicker
noise
upconversion in the oscillator. A Figure of Merit
(FOM) methodology
suitable to the 1/f^3 phase noise region is also
developed. This work
will be of particular interest to practicing
engineers in RFIC design, as
well as graduate students and advanced undergraduates.
the architecture
most amenable to complete monolithic integration, are
hindered by the
1/f^3 noise of the local oscillator. This work
explores sources of flicker
noise generation in the cross-coupled negative
resistance oscillator
(NMOS, PMOS, and CMOS). Prior and current work in the
area of phase
noise modeling is reviewed, including the work of
Leeson, Hajimiri,
Hegazi, and others, seeking the mechanisms by which
flicker noise is
upconverted. The work of Hajimiri is extended with a
simple hardware DC estimator for the special case of LC CMOS
oscillators. A method of
adaptive control of an oscillator core is presented,
as well, using this
estimate to maintain the condition of minimum flicker
noise
upconversion in the oscillator. A Figure of Merit
(FOM) methodology
suitable to the 1/f^3 phase noise region is also
developed. This work
will be of particular interest to practicing
engineers in RFIC design, as
well as graduate students and advanced undergraduates.