Rao Tummala

Fundamentals of Device and Systems Packaging: Technologies and Applications, Second Edition

• Gebundenes Buch

Produktbeschreibung

Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product. A fully updated, comprehensive guide to microelectronic device and systems packaging principles and practices This thoroughly revised book offers the latest, comprehensive fundamentals in device and systems packaging technologies and applications. You will get in-depth explanations of the 15 core packaging technologies that make up any electronic system, including electrical design for power, signal, and EMI; thermal design by conduction, convection,and radiation heat transfer; thermo-mechanical failures and reliability;advanced packaging materials at micro and nanoscales; ceramic, organic, glass,and silicon substrates. This resource also discusses passive components such as capacitors, inductors, and resistors and their proximity integration with actives; chip-to-package interconnections and assembly; wafer and panel embedding technologies; 3D packaging with and without TS; RF and millimeter-wave packaging; role of optoelectronics; mems and sensor packaging;encapsulation, molding and sealing; and printed wiring board and its assembly to form end-product systems. Fundamentals of Device and Systems Packaging: Technologies and Applications, Second Edition introduces the concept of Moore's Law for packaging, as Moore's Law for ICs is coming to an end due to physical, material, electrical, and financial limitations. Moore's Law for Packaging (MLP) can be viewed as interconnecting and integrating many smaller chips with high aggregate transistor density, at higher performance and lower cost than Moore's Law for ICs. This book lays the groundwork for Moore's Law for Packaging by showing how I/Os have evolved from one package family node to the next, starting with <16 I/Os in the 1960s with leadframe-plastic packages to the current silicon interposers with about 200,000 I/Os. It proposes a variety of ways to extend Moore's Law, such as extending Si interposers and beyond using glass panel embedding. As Moore's Law for Electronic Packaging comes to its end, this book proposes 3D opto-electronics in the short term and, ultimately, Quantum Computing as the next Moore's Law.

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Produktdetails

• Verlag: McGraw Hill LLC
• 2nd edition
• Seitenzahl: 848
• Erscheinungstermin: 2. September 2019
• Englisch
• Abmessung: 245mm x 196mm x 47mm
• Gewicht: 1429g
• ISBN-13: 9781259861550
• ISBN-10: 1259861554
• Artikelnr.: 46467189

Autorenporträt

Rao Tummala is a Chair professor and Director of the Microsystems Packaging Center at the Georgia Institute of Technology. The author of Microelectronics Packaging Handbook, Volumes I, II, and III, the best-selling reference that defines the entire field, he is an electronics and materials engineer and an experienced designer of microelectronics. He was a longtime packaging technologist and IBM Fellow at IBM.

Inhaltsangabe

Preface
1 Introduction to Device and Systems Packaging Technologies
1.1 What Is Packaging and Why?
1.1.1 What Is Packaging?
1.1.2 Why Is Packaging Important?
1.1.3 Every IC and Device Has to Be Packaged
1.1.4 Controls Performance of Computers
1.1.5 Controls Size of Consumer Electronics
1.1.6 Controls Reliability of Electronics
1.1.7 Controls Cost of Electronic Products
1.1.8 Required in Nearly Everything
1.2 Anatomy of an Electronic Packaged System from a Packaging Point of View
1.2.1 Fundamentals of Packaging
1.2.2 Systems Packaging Involves Electrical, Mechanical, and Materials
Technologies
1.2.3 Nomenclature
1.3 Devices and Moore's Law
1.3.1 On-Chip Interconnections
1.3.2 Interconnect Materials
1.3.3 The Resistance and Capacitance Delays (RC Delays) of On-Chip
Interconnects
1.3.4 Future of Device Scaling
1.4 Electronic Technology Waves: Microelectronics, RF/Wireless, Photonics,
MEMS, and Quantum Devices
1.4.1 Microelectronics: The First Technology Wave
1.4.2 RF and Wireless: The Second Technology Wave
1.4.3 Photonics: The Third Technology Wave
1.4.4 Micro-Electro-Mechanical Systems (MEMS): The Fourth Technology Wave
1.4.5 Quantum Devices and Computing: Fifth Wave
1.5 Packaging and Moore's Law for Packaging
1.5.1 Three Eras in Packaging
1.5.2 Moore's Law or SOC Era (1960-2010)
1.5.3 Moore's Law for Packaging Era from 2010 to 2025
1.5.4 Moore's Law for Systems Era from 2025
1.6 Electronic Systems Technologies Trends
1.6.1 Core Packaging Technologies
1.6.2 Packaging Technologies and Their Trends
1.7 Future Outlook
1.7.1 Emerging Computing Systems
1.7.2 Emerging 3D Systems Packaging
1.8 How the Book Is Organized
1.9 Homework Problems
1.10 Suggested Reading
Part 1 Fundamentals of Packaging
2 Fundamentals of Electrical Design for Signals, Power, and Electromagnetic
Interference
2.1 What Is Electrical Package Design and Why?
2.2 Electrical Anatomy of a Package
2.2.1 Fundamentals of Electrical Package Design
2.2.2 Nomenclature
2.3 Signal Distribution
2.3.1 Devices and Interconnections
2.3.2 Kirchhoff's Laws and Transit Time Delay
2.3.3 Transmission Line Behavior of Interconnections
2.3.4 Characteristic Impedance
2.3.5 Typical Transmission Line Structures Used as Package Interconnections
2.3.6 Transmission Line Losses
2.3.7 Crosstalk
2.4 Power Distribution
2.4.1 Power Supply Noise
2.4.2 Inductive Effects
2.4.3 Effective Inductance
2.4.4 Effect of Package Design on Inductance
2.4.5 Decoupling Capacitors
2.5 Electromagnetic Interference
2.6 Summary and Future Trends
2.7 Homework Problems
2.8 Suggested Reading
3 Fundamentals of Thermal Technologies
3.1 What Is Thermal Management and Why?
3.2 Anatomy of a Thermal Package System
3.2.1 Fundamentals of Heat Transfer
3.2.2 Nomenclature
3.3 Chip Level Thermal Technologies
3.3.1 Thermal Interface Materials (TIMs)
3.3.2 Heat Spreaders
3.3.3 Thermal Vias
3.4 Module Level Thermal Technologies
3.4.1 Heat Sinks
3.4.2 Heat Pipes and Vapor Chambers
3.4.3 Closed-Loop Liquid Cooling
3.4.4 Cold Plates
3.4.5 Immersion Cooling
3.4.6 Jet Impingement Cooling
3.4.7 Spray Cooling
3.5 System Level Thermal Technologies
3.5.1 Air Cooling
3.5.2 Hybrid Cooling
3.5.3 Immersion Cooling
3.6 Power and Cooling Technologies for Electric Vehicles
3.7 Summary and Future Trends
3.8 Homework Problems
3.9 Suggested Reading
4 Fundamentals of Thermo-Mechanical Reliability
4.1 What Is Thermo-Mechanical Reliability?
4.2 Anatomy of a Package with Failures and Failure Mechanisms
4.2.1 Fundamentals of Thermo-Mechanical Reliability
4.2.2 Thermo-Mechanical Modeling
4.2.3 Nomenclature
4.3 Types of Thermo-Mechanical-Induced Failures and Design Guidelines for
Reliability
4.3.1 Fatigue Failures
4.3.2 Brittle Fractures
4.3.3 Creep-Induced Failures
4.3.4 Delamination-Induced Failures
4.3.5 Plastic Deformation Failures
4.3.6 Warpage-Induced Failures
4.4 Summary and Future Trends
4.5 Homework Problems
4.6 Suggested Reading
5 Fundamentals of Package Materials at Microscale and Nanoscale
5.1 What Is the Role of Materials in Packaging?
5.2 Anatomy of a Package with a Variety of Materials
5.2.1 Fundamentals of Package Materials
5.2.2 Nomenclature
5.3 Package Materials, Processes, and Properties
5.3.1 Substrate Materials, Processes, and Properties
5.3.2 Interconnection and Assembly Materials, Processes, and Properties
5.3.3 Passive Component Materials, Processes, and Properties
5.3.4 Thermal and Thermal Interface Materials (TIMs), Processes, and
Properties
5.4 Summary and Future Trends
5.5 Homework Problems
5.6 Suggested Reading
6 Fundamentals of Ceramic, Organic, Glass, and Silicon Package Substrates
6.1 What Is a Package Substrate and Why?
6.2 Anatomy of Three Package Substrates: Ceramics, Organic Laminates, and
Silicon
6.2.1 Fundamentals of Package Substrates
6.2.2 Nomenclature
6.3 Package Substrate Technologies
6.3.1 Historical Trends
6.4 Thick-Film Substrates
6.4.1 Ceramic Substrates
6.5 Thin-Film Substrates
6.5.1 Organic Substrates
6.5.2 Glass Substrates
6.6 Ultra-Thin-Film Substrates with Semiconductor Packaging Processes
6.6.1 Silicon Substrates
6.7 Summary and Future Trends
6.8 Homework Problems
6.9 Suggested Reading
7 Fundamentals of Passive Components and Integration with Active Devices
7.1 What Are Passive Components and Why?
7.2 Anatomy of Passive Components
7.2.1 Fundamentals of Passive Components
7.2.2 Nomenclature
7.3 Passive Component Technologies
7.3.1 Discrete Passives
7.3.2 Integrated Passive Devices (IPDs)
7.3.3 Embedded Discrete Passives
7.3.4 Embedded Thin-Film Passives
7.4 Functional Modules with Passives and Actives
7.4.1 RF Modules
7.4.2 Power Modules
7.4.3 Voltage Regulator Power Modules
7.5 Summary and Future Trends
7.6 Homework Problems
7.7 Suggested Reading
8 Fundamentals of Chip-to-Package Interconnections and Assembly
8.1 What Are Chip-to-Package Interconnections and Assembly and Why?
8.2 Anatomy of an Interconnection and Assembly
8.2.1 Types of Chip-Level Interconnections and Assembly Technologies
8.2.2 Fundamentals of Interconnections and Assembly
8.2.3 Fundamentals of Assembly and Bonding
8.2.4 Nomenclature
8.3 Interconnection and Assembly Technologies
8.3.1 Evolution
8.4 Interconnections and Assembly Technologies
8.4.1 Wire-Bonding
8.4.2 Tape Automated Bonding (TAB)
8.4.3 Flip-Chip Interconnection and Assembly Technology
8.4.4 Copper Pillar with Solder Cap Technology
8.4.5 SLID Interconnection and Assembly Technology
8.5 Future Trends in Interconnection and Assembly Technologies
8.5.1 Extension of SLID
8.6 Homework Problems
8.7 Suggested Reading
9 Fundamentals of Embedded and Fan-Out Packaging
9.1 What Is Embedding and Fan-Out Packaging and Why?
9.1.1 Why Embedding and Fan-Out Packaging?
9.2 Anatomy of a Fan-Out Wafer-Level Package (FO-WLP)
9.2.1 A Typical Fan-Out Wafer-Level Package Process
9.2.2 Fundamentals of Fan-Out Wafer-Level Package Technology
9.2.3 Nomenclature
9.3 Fan-Out Wafer-Level Package Technologies
9.3.1 Types
9.3.2 Materials and Processes
9.3.3 Fan-Out Wafer-Level Packaging Tools
9.3.4 Challenges in Fan-Out Wafer-Level Packaging Technology
9.3.5 Applications of Fan-Out Wafer-Level Packaging
9.4 Panel-Level Package (PLP)
9.4.1 What Is Panel-Level Packaging and Why?
9.4.2 Types of Manufacturing Infrastructure for Panel-Level Packaging
9.4.3 Applications of Panel-Level Packaging
9.5 Summary and Future Trends
9.6 Homework Problems
9.7 Suggested Reading
10 Fundamentals of 3D Packaging with and without TSV
10.1 What Are 3D ICs with TSV and Why?
10.1.1 Why 3D ICs with TSVs?
10.2 Anatomy of a 3D Package with TSV
10.2.1 Fundamentals of 3D ICs with TSV
10.2.2 Nomenclature
10.3 3D ICs with TSV Technologies
10.3.1 Through-Silicon-Vias (TSVs)
10.3.2 Ultra-Thin ICs
10.3.3 Back-End-of-Line (BEOL) RDL Wiring
10.3.4 Chip-to-Chip Interconnections within the 3D Stack
10.3.5 Packages for 3D IC Stacks
10.3.6 Underfill
10.4 Summary and Future Trends
10.5 Homework Problems
10.6 Suggested Reading
10.7 Acknowledgment
11 Fundamentals of RF and Millimeter-Wave Packaging
11.1 What Is RF and Why?
11.1.1 History and Evolution
11.1.2 When Was the First Mobile Phone Introduced?
11.2 Anatomy of an RF System
11.2.1 Fundamentals of RF
11.2.2 RF Nomenclature
11.3 RF Technologies and Applications
11.3.1 Transceiver
11.3.2 Transmitter
11.3.3 Receiver
11.3.4 Modulation Schemes
11.3.5 Antenna
11.3.6 Components in RF Front-End Module
11.3.7 Filters
11.3.8 RF Materials and Components
11.3.9 RF Modeling and Characterization Techniques
11.3.10 Applications of RF
11.4 What Is a Millimeter-Wave System?
11.5 Anatomy of a Millimeter-Wave Package
11.5.1 Fundamentals of Millimeter-Wave Packaging
11.6 Millimeter-Wave Technologies and Applications
11.6.1 5G and Beyond
11.6.2 Automotive Radars
11.6.3 Millimeter-Wave Imaging
11.7 Summary and Future Trends
11.8 Homework Problems
11.9 Suggested Reading
12 Fundamentals of Optoelectronics Packaging
12.1 What Is Optoelectronics?
12.2 Anatomy of an Optoelectronics System
12.2.1 Fundamentals of Optoelectronics
12.2.2 Nomenclature
12.3 Optoelectronic Technologies
12.3.1 Active Optoelectronic Devices
12.3.2 Passive Optical Devices
12.3.3 Optical Interconnections
12.4 Optoelectronic Systems, Applications, and Markets
12.4.1 Optoelectronic Systems
12.4.2 Applications of Optoelectronics
12.4.3 Optoelectronics Markets
12.5 Summary and Future Trends
12.6 Homework Problems
12.7 Suggested Reading
13 Fundamentals of MEMS and Sensor Packaging
13.1 What Are MEMS?
13.1.1 Historical Evolution
13.2 Anatomy of a MEMS Package
13.2.1 Fundamentals of MEMS Packaging
13.2.2 Nomenclature
13.3 MEMS and Sensor Device Fabrication Technologies
13.3.1 Photolithographic Pattern Transfer
13.3.2 Thin-Film Deposition
13.3.3 Wet and Dry Etching
13.3.4 Bulk and Surface Micromachining of Silicon
13.3.5 Wafer Bonding
13.3.6 Laser Micromachining
13.3.7 Process Integration
13.4 MEMS Packaging Technologies
13.4.1 MEMS Package Materials
13.4.2 MEMS Package Assembly Processes
13.5 Application of MEMS and Sensors
13.5.1 Pressure Sensors
13.5.2 Accelerometers and Gyroscopes
13.5.3 Projection Displays
13.6 Summary and Future Trends
13.7 Homework Problems
13.8 Suggested Reading
14 Fundamentals of Package Encapsulation, Molding, and Sealing
14.1 What Is Sealing and Encapsulation and Why?
14.2 Anatomy of an Encapsulated and a Sealed Package
14.2.1 Fundamentals of Encapsulation and Sealing
14.2.2 Nomenclature
14.3 Properties of Encapsulants
14.3.1 Mechanical Properties
14.3.2 Thermal Properties
14.3.3 Physical Properties
14.4 Encapsulation Materials
14.4.1 Epoxy and Related Materials
14.4.2 Cyanate Ester
14.4.3 Urethanes
14.4.4 Silicones
14.5 Encapsulation Processes
14.5.1 Molding
14.5.2 Liquid Encapsulation
14.6 Hermetic Sealing
14.6.1 Sealing Processes
14.7 Summary and Future Trends
14.8 Homework Problems
14.9 Suggested Reading
15 Fundamentals of Printed Wiring Boards
15.1 What Is a Printed Wiring Board?
15.2 Anatomy of a Printed Wiring Board
15.2.1 Fundamentals of Printed Wiring Boards
15.2.2 Types of PWBs
15.2.3 PWB Material Grades
15.2.4 Single- to Multi-Layer Boards and Their Applications
15.2.5 PWB Design Elements
15.2.6 Nomenclature
15.3 Printed Wiring Board Technologies
15.3.1 PWB Materials
15.3.2 PWB Fabrication
15.3.3 PWB Applications
15.4 Summary and Future Trends
15.5 Homework Problems
15.6 Suggested Reading
16 Fundamentals of Board Assembly
16.1 What Is a Printed Circuit Board Assembly (PCBA) and Why?
16.2 Anatomy of Printed Circuit Board Assembly
16.2.1 Fundamentals of PCBA
16.2.2 Nomenclature
16.3 PCBA Technologies
16.3.1 PCB Substrate
16.3.2 Package Substrates
16.4 Types of Printed Circuit Board Assembly
16.4.1 Plated Through Hole (PTH) Assembly
16.4.2 Surface Mount Assembly (SMA)
16.5 Types of Assembly Soldering Processes
16.5.1 Reflow Soldering
16.5.2 Wave Soldering with PTH
16.6 Summary and Future Trends
16.7 Homework Problems
16.8 Suggested Reading
16.9 Acknowledgment
Part 2 Applications of Packaging Technologies
17 Applications of Packaging Technologies in Future Car Electronics
17.1 What Are Future Car Electronics and Why?
17.2 Anatomy of a Future Car
17.2.1 Fundamentals of a Future Car
17.2.2 Nomenclature
17.3 Future Car Electronic Technologies
17.3.1 Computing and Communications
17.3.2 Sensing Electronics
17.3.3 High-Power Electronics
17.4 Summary and Future Trends
17.5 Homework Problems
17.6 Suggested Reading
18 Applications of Packaging Technologies in Bioelectronics
18.1 What Are Bioelectronics?
18.1.1 Bioelectronics Applications
18.1.2 Anatomy of a Bioelectronic System
18.2 Packaging Technologies for Bioelectronic Systems
18.2.1 Biocompatible and Biostable Packaging
18.2.2 Heterogeneous Integration
18.3 Examples of Bioelectronic Implants
18.3.1 Pacemakers and Electronic Stents
18.3.2 Cochlear Implants
18.3.3 Retinal Prosthetics
18.3.4 Neuromuscular Stimulators
18.3.5 Brain Neural Recording and Stimulations
18.4 Summary and Future Trends
18.5 Homework Problems
18.6 Suggested Reading
19 Applications of Packaging Technologies in Communication Systems
19.1 What Are Communication Systems and Why?
19.2 Anatomy of Two Communication Systems: Wired and Wireless
19.2.1 Anatomy of a Wired Communication System
19.2.2 Anatomy of a Wireless Communication System
19.3 Communication System Technologies
19.3.1 Historical Evolution
19.3.2 Communication System Technologies
19.3.3 Wireless Communication System Technologies
19.4 Summary and Future Trends
19.5 Homework Problems
19.6 Suggested Reading
20 Applications of Packaging Technologies in Computing Systems
20.1 What Is Computer Packaging?
20.2 The Anatomy of a Computer Package
20.2.1 Fundamentals of Computer Packaging
20.2.2 Types of Computing Systems
20.2.3 Nomenclature
20.3 Computer Packaging Technologies
20.3.1 Evolution
20.3.2 Interconnection Technologies
20.3.3 Interconnection Designs for Signal and Power
20.4 Thermal Technologies
20.4.1 Thermal Management
20.4.2 Thermo-Mechanical Reliability
20.4.3 Material Technologies
20.5 Summary and Future Trends
20.5.1 Beginning of Moore's Law for Packaging
20.5.2 Moore's Law for Packaging: Cost
20.6 Homework Problems
20.7 Suggested Reading
20.8 Acknowledgments
21 Applications of Packaging Technologies in Flexible Electronics
21.1 What Are Flexible Electronics and Why?
21.1.1 Applications
21.2 Anatomy of a Flexible Electronic System
21.2.1 Fundamentals of Flexible Electronics Technologies
21.2.2 Nomenclature
21.3 Flexible Electronics Technologies
21.3.1 Component Technologies
21.3.2 Process Integration of Flexible Electronics Technologies
21.3.3 Component Assembly on Flexible Substrates
21.4 Summary and Future Trends
21.5 Homework Problems
21.6 Suggested Reading
22 Applications of Packaging Technologies in Smartphones
22.1 What Are Smartphones?
22.1.1 Why Smartphones?
22.1.2 Historical Evolution of Smartphones
22.2 Anatomy of a Smartphone
22.2.1 Fundamentals of Smartphones
22.2.2 Nomenclature
22.3 Smartphone Packaging Technologies
22.3.1 Application Processor Packaging
22.3.2 Memory Packaging
22.3.3 RF Packaging
22.3.4 Power Packaging
22.3.5 MEMS and Sensors Packaging
22.4 Systems Packaging in Smartphones
22.5 Summary and Future Trends
22.6 Homework Problems
22.7 Suggested Reading
Index