This book brings together a selection of the best papers from the nineteenth edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 14-16, 2016, in Bremen, Germany. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
This book brings together a selection of the best papers from the nineteenth edition of the Forum on specification and Design Languages Conference (FDL), which took place on September 14-16, 2016, in Bremen, Germany. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
Franco Fummi received the Laurea degree in Electronic Engineering at Politecnico di Milano in 1990 and the Ph.D.in Electronic and Communication Engineering in 1994 at Politecnico di Milano. In 1993 he was Research Assistant at the department of Computer Science of the University of Victoria (B.C.). In 1996 he obtained the position of Assistant Professor in Computer Science at the Dipartimento di Elettronica e Informazione of Politecnico di Milano where he remained until October 1998. In July 1998 he obtained the position of Associate Professor in Computer Architecture at the Computer Science Department of Università di Verona. Since March 2001 he is Full Professor in Computer Architecture at the Computer Science Department of Università di Verona He is leading the Electronic Systems Design (ESD) group of the Università di Verona (http://esd.sci.univr.it), currently composed of more than 20 people and working on hardware description languages and electronic design automation method
ologies for modeling, verification, testing and optimization of embedded systems.
Inhaltsangabe
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation.- Chapter2. Designing Reliable Cyber-Physical Systems.- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study.- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems.- Chapter5. Feature based State Space Coverage of Analog Circuits.- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation.- Chapter2. Designing Reliable Cyber-Physical Systems.- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study.- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems.- Chapter5. Feature based State Space Coverage of Analog Circuits.- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation.- Chapter2. Designing Reliable Cyber-Physical Systems.- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study.- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems.- Chapter5. Feature based State Space Coverage of Analog Circuits.- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation.- Chapter2. Designing Reliable Cyber-Physical Systems.- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study.- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems.- Chapter5. Feature based State Space Coverage of Analog Circuits.- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
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