Alexander Barkalov, Kazimierz Krzywicki, Larysa Titarenko
Logic Synthesis for FPGA-Based Mealy Finite State Machines
Structural Decomposition in Logic Design
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Alexander Barkalov, Kazimierz Krzywicki, Larysa Titarenko
Logic Synthesis for FPGA-Based Mealy Finite State Machines
Structural Decomposition in Logic Design
- Gebundenes Buch
This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources.
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This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources.
Produktdetails
- Produktdetails
- Verlag: Taylor & Francis Ltd
- Seitenzahl: 336
- Erscheinungstermin: 1. Juli 2025
- Englisch
- Abmessung: 234mm x 156mm
- ISBN-13: 9781032882277
- ISBN-10: 1032882271
- Artikelnr.: 71302992
- Verlag: Taylor & Francis Ltd
- Seitenzahl: 336
- Erscheinungstermin: 1. Juli 2025
- Englisch
- Abmessung: 234mm x 156mm
- ISBN-13: 9781032882277
- ISBN-10: 1032882271
- Artikelnr.: 71302992
Alexander Barkalov received his M.Sc. degree in Computer Engineering from the Donetsk Politechnical Institute (currently Donetsk National Technical University), Ukraine, in 1976, and his Ph.D. degree in Computer Science from the Leningrad Institute of Precise Mechanics and Optics, Russia, in 1983. In 1995 he received Doctor of Technical Sciences degree in Computer Science from Institute of Cybernetics named after V.M. Glushkov (Kiev, Ukraine). He has been a Professor (since 1996) at the Institute of Computers, Donetsk National Technical University. From 2003 he is a Professor of Computer Engineering at the Institute of Informatics and Electronics, University of Zielona Góra, Poland, and he still is a Professor at the Institute of Computers, Donetsk National Technical University. His current research interests include theory of digital automata, especially the methods of synthesis and optimization of control units implemented with field-programmable logic devices. Larysa Titarenko (member of HiPEAC) received the M.Sc. (1993), PhD (1996) and Doctor of Technical Sciences (2005) degree in Telecommunications from Kharkov National University of Radioelectronics, Ukraine. Since 2007 she has been a Professor of Telecommunications at the Institute of Informatics and Electronics, University of Zielona Góra, Poland, and she is still a Professor of telecommunications at the Institute of Infocommunication Engineering, Kharkov National University of Radioelectronics, Ukraine. Her current research interests include theory of telecommunication systems, theory of antennas and theory of digital automata and its applications. Kazimierz Krzywicki obtained PhD in computer science from University of Zielona Gora in 2019. Since 2010, he founded and heads the KGK Pro company, which creates software and hardware solutions. The main areas of activity are embedded systems and Internet of Things - especially animal tracking devices. The company was the first in the world to introduce a bird tracking device equipped with a camera. For over 12 years he has been an expert witness and computer forensics investigator. He is also a member of PTI (Polish Information Processing Society). His research interests include design and implementation of distributed embedded systems and hardware synthesis for reprogrammable devices.
Chapter 1
Designing FPGA
based FSMs Chapter 2
Methods Of State Assignment Chapter 3
Reducing power consumption in FPGA
based FSMs Chapter 4
Structural decomposition in FSM design Chapter 5
Logic synthesis based on encoding of fields of compatible states Chapter 6
Optimizing FCS
based FSMs Chapter 7
Synthesis of FSMs with composite state codes Chapter 8
Reducing LUT count in FSMs with transformation of objects
Designing FPGA
based FSMs Chapter 2
Methods Of State Assignment Chapter 3
Reducing power consumption in FPGA
based FSMs Chapter 4
Structural decomposition in FSM design Chapter 5
Logic synthesis based on encoding of fields of compatible states Chapter 6
Optimizing FCS
based FSMs Chapter 7
Synthesis of FSMs with composite state codes Chapter 8
Reducing LUT count in FSMs with transformation of objects
Chapter 1
Designing FPGA
based FSMs Chapter 2
Methods Of State Assignment Chapter 3
Reducing power consumption in FPGA
based FSMs Chapter 4
Structural decomposition in FSM design Chapter 5
Logic synthesis based on encoding of fields of compatible states Chapter 6
Optimizing FCS
based FSMs Chapter 7
Synthesis of FSMs with composite state codes Chapter 8
Reducing LUT count in FSMs with transformation of objects
Designing FPGA
based FSMs Chapter 2
Methods Of State Assignment Chapter 3
Reducing power consumption in FPGA
based FSMs Chapter 4
Structural decomposition in FSM design Chapter 5
Logic synthesis based on encoding of fields of compatible states Chapter 6
Optimizing FCS
based FSMs Chapter 7
Synthesis of FSMs with composite state codes Chapter 8
Reducing LUT count in FSMs with transformation of objects