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Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over last decades. The importance of FPGAs comes from their architecture, which consists of programmable logic functionality blocks and programmable interconnects. This nature of FPGA has a terrific impact on the quality of the final product's performance, area, and power consumption. There are many techniques to make FPGAs more energy efficient. In this work, we target introducing new design techniques to lower FPGAs power at device and circuit levels.