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The demand for high speed Field Programmable Gate Arrays (FPGAs) has always been on the rise. The availability of silicon germanium (SiGe) heterojunction bipolar transistor (HBT) devices has opened the door for gigahertz FPGAs. The integration of these high-speed SiGe HBTs and low power CMOS gives a significant speed advantage to SiGe FPGAs. This book concentrates on how to minimize power consumption in SiGe BiCMOS mixed-signal FPGAs, and the combination of ADCs and deserializers together with the FPGA. In this unique resource, Professor Zhou covers the following topics: 1.New low power…mehr

Produktbeschreibung
The demand for high speed Field Programmable Gate
Arrays (FPGAs) has always been on the rise. The
availability of silicon germanium (SiGe)
heterojunction bipolar transistor (HBT) devices has
opened the door for gigahertz FPGAs. The integration
of these high-speed SiGe HBTs and low power CMOS
gives a significant speed advantage to SiGe FPGAs.
This book concentrates on how to minimize power
consumption in SiGe BiCMOS mixed-signal FPGAs, and
the combination of ADCs and deserializers together
with the FPGA. In this unique resource, Professor
Zhou covers the following topics:
1.New low power circuit techniques, novel
architectures, and layout skills for high-speed FPGA
designs;
2.Applications of SiGe FPGAs from a real-world
perspective. IBM SiGe BiCMOS processes are used for
all circuits and applications;
3.Emerging trends in high-speed FPGA system and
applications;
4.Testing requirements and methods for GHz circuits
and blocks.
IC designers can find detailed information of GHz
circuit design and testing. This book can also help
application engineers to understand the FPGA internal
architectures and application optimization.
Autorenporträt
Dr. Kuan Zhou is an assistant professor of Electrical and
Computer Engineering at University of New
Hampshire in Durham, New Hampshire. He earned his Ph.D. in
electrical engineering at Rensselaer Polytechnic
Institute in 2004. Dr. Zhou s expertise is in high-speed mixed-
signal design and low power analog VLSI (aVLSI) design.