This book presents a comprehensive analysis on CNT and GNR for their applicability in future VLSI interconnects. The modeling work presented in this book can be utilized for designing complete VLSI circuits using the traditional VLSI design tools for future generation technology nodes. Utilizing our proposed non-SPICE ABCD parameter matrix based unified model, a simulator could be developed to further facilitate the study of the relative merits/demerits of various prospective nano-interconnect configurations.