MPSoCs with single-ISA heterogeneous multi-core architecture - Prasath, R.Arun;Maheswari, P.Uma
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The RST processor allocation method for MPSoCs with single-ISA heterogeneous multi-core architecture, which is considered to be a promising platform for developing MPSoCs. The goal of the proposed method is to end a proper processor allocation and task mapping configuration such that the target workload's execution time is optimized while the given resource/area constrain is met. Since the solution space of the target synthesis problem grows exponentially with the number of tasks in the target workload, and the number of cores, we proposed a heuristic-based method that rst decides the groups…mehr

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Produktbeschreibung
The RST processor allocation method for MPSoCs with single-ISA heterogeneous multi-core architecture, which is considered to be a promising platform for developing MPSoCs. The goal of the proposed method is to end a proper processor allocation and task mapping configuration such that the target workload's execution time is optimized while the given resource/area constrain is met. Since the solution space of the target synthesis problem grows exponentially with the number of tasks in the target workload, and the number of cores, we proposed a heuristic-based method that rst decides the groups of tasks that should be mapped to the same processor, and then perform processor allocation and task mapping. The experimental results show that, theproposed method effectively reduced the solution space, and synthesized a good quality configuration in a reasonable time. Under the same area constraint, the results synthesized by our method achieved up to 8.25% of performance improvement over the performance of the system with all simple cores, which provide the maximum execution parallelism in the system.
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Autorenporträt
Dr. R. Arun Prasath, Professor no Departamento de ECE no Siddhartha Institute of Technology & Science,Telangana. Recebeu o seu doutoramento no ICE da Universidade Anna, Chennai. Possui mais de 10 anos de experiência no ensino, bem como na investigação. O seu interesse de investigação inclui VLSI Signal Processing,Lowpower VLSI & WIreless Sensor Network.