Nano-CMOS and Post-CMOS Electronics: Circuits and Design
Herausgeber: Mohanty, Saraju P.; Srivastava, Ashok
Nano-CMOS and Post-CMOS Electronics: Circuits and Design
Herausgeber: Mohanty, Saraju P.; Srivastava, Ashok
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Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels.
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Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels.
Produktdetails
- Produktdetails
- Materials, Circuits and Devices
- Verlag: Institution of Engineering and Technology
- Seitenzahl: 448
- Erscheinungstermin: 28. April 2016
- Englisch
- Abmessung: 239mm x 163mm x 28mm
- Gewicht: 802g
- ISBN-13: 9781849199995
- ISBN-10: 184919999X
- Artikelnr.: 45009747
- Materials, Circuits and Devices
- Verlag: Institution of Engineering and Technology
- Seitenzahl: 448
- Erscheinungstermin: 28. April 2016
- Englisch
- Abmessung: 239mm x 163mm x 28mm
- Gewicht: 802g
- ISBN-13: 9781849199995
- ISBN-10: 184919999X
- Artikelnr.: 45009747
* Chapter 1: Self-healing analog/RF circuits
* Chapter 2: On-chip gate delay variability measurement in scaled
technology node
* Chapter 3: Nanoscale FinFET devices for PVT-aware SRAM
* Chapter 4: Data stability and write ability enhancement techniques
for FinFET SRAM circuits
* Chapter 5: Low-leakage techniques for nanoscale CMOS circuits
* Chapter 6: Thermal effects in carbon nanotube VLSI interconnects
* Chapter 7: Lumped electro-thermal modeling and analysis of carbon
nanotube interconnects
* Chapter 8: High-level synthesis of digital integrated circuits in the
nanoscale mobile electronics era
* Chapter 9: SPICEless RTL design optimization of nanoelectronic
digital integrated circuits
* Chapter 10: Green on-chip inductors for three-dimensional integrated
circuits: concepts, algorithms and applications
* Chapter 11: 3D NoC: a promising alternative for tomorrow's nanosystem
design
* Chapter 12: A new paradigm towards performance centric computation
beyond CMOS: DNA computing
* Chapter 2: On-chip gate delay variability measurement in scaled
technology node
* Chapter 3: Nanoscale FinFET devices for PVT-aware SRAM
* Chapter 4: Data stability and write ability enhancement techniques
for FinFET SRAM circuits
* Chapter 5: Low-leakage techniques for nanoscale CMOS circuits
* Chapter 6: Thermal effects in carbon nanotube VLSI interconnects
* Chapter 7: Lumped electro-thermal modeling and analysis of carbon
nanotube interconnects
* Chapter 8: High-level synthesis of digital integrated circuits in the
nanoscale mobile electronics era
* Chapter 9: SPICEless RTL design optimization of nanoelectronic
digital integrated circuits
* Chapter 10: Green on-chip inductors for three-dimensional integrated
circuits: concepts, algorithms and applications
* Chapter 11: 3D NoC: a promising alternative for tomorrow's nanosystem
design
* Chapter 12: A new paradigm towards performance centric computation
beyond CMOS: DNA computing
* Chapter 1: Self-healing analog/RF circuits
* Chapter 2: On-chip gate delay variability measurement in scaled
technology node
* Chapter 3: Nanoscale FinFET devices for PVT-aware SRAM
* Chapter 4: Data stability and write ability enhancement techniques
for FinFET SRAM circuits
* Chapter 5: Low-leakage techniques for nanoscale CMOS circuits
* Chapter 6: Thermal effects in carbon nanotube VLSI interconnects
* Chapter 7: Lumped electro-thermal modeling and analysis of carbon
nanotube interconnects
* Chapter 8: High-level synthesis of digital integrated circuits in the
nanoscale mobile electronics era
* Chapter 9: SPICEless RTL design optimization of nanoelectronic
digital integrated circuits
* Chapter 10: Green on-chip inductors for three-dimensional integrated
circuits: concepts, algorithms and applications
* Chapter 11: 3D NoC: a promising alternative for tomorrow's nanosystem
design
* Chapter 12: A new paradigm towards performance centric computation
beyond CMOS: DNA computing
* Chapter 2: On-chip gate delay variability measurement in scaled
technology node
* Chapter 3: Nanoscale FinFET devices for PVT-aware SRAM
* Chapter 4: Data stability and write ability enhancement techniques
for FinFET SRAM circuits
* Chapter 5: Low-leakage techniques for nanoscale CMOS circuits
* Chapter 6: Thermal effects in carbon nanotube VLSI interconnects
* Chapter 7: Lumped electro-thermal modeling and analysis of carbon
nanotube interconnects
* Chapter 8: High-level synthesis of digital integrated circuits in the
nanoscale mobile electronics era
* Chapter 9: SPICEless RTL design optimization of nanoelectronic
digital integrated circuits
* Chapter 10: Green on-chip inductors for three-dimensional integrated
circuits: concepts, algorithms and applications
* Chapter 11: 3D NoC: a promising alternative for tomorrow's nanosystem
design
* Chapter 12: A new paradigm towards performance centric computation
beyond CMOS: DNA computing