The power quality in a system is reflected due to the presence of power system disturbance. The power system disturbance can be due to either steady state load currents or due to dynamic operations and faults. The power quality issues are classified with respect to the voltage magnitude and duration of disturbance. DVR, DSTATCOM and SSTS are the devices which can be used for protecting the sensitive loads from the power quality issues. The factors that affect the DVR performance are: disturbance coming from the load, voltage regulation, stability. The objectives of the research work is to: model the elements of DVR for medium voltage level, model the Cascade H-Bridge (CHB) multilevel topology for DVR, study different control algorithms for voltage regulation, disturbance rejection and reduction of DC energy storage and finally propose a unique algorithm for DVR .