Andere Kunden interessierten sich auch für
![The Chaos-Based Dual Entropy Core TRNG on FPGA]( "The Chaos-Based Dual Entropy Core TRNG on FPGA")
The Chaos-Based Dual Entropy Core TRNG on FPGA40,99 €![Soft Core Processor Using Fpga]( "Soft Core Processor Using Fpga")
Soft Core Processor Using Fpga23,99 €![Threshold Based Multiuser Switched Diversity Scheduling Schemes]( "Threshold Based Multiuser Switched Diversity Scheduling Schemes")
Threshold Based Multiuser Switched Diversity Scheduling Schemes39,99 €![Scalable and low power N.O.C design for reconfigurable system]( "Scalable and low power N.O.C design for reconfigurable system")
Scalable and low power N.O.C design for reconfigurable system50,99 €![Advanced AES Core]( "Advanced AES Core")
Advanced AES Core36,99 €![Modeling and Design of a Three-dimensional Inductor with Magnetic Core]( "Modeling and Design of a Three-dimensional Inductor with Magnetic Core")
Modeling and Design of a Three-dimensional Inductor with Magnetic Core32,99 €![Unification of DG Units to the Electrical Network]( "Unification of DG Units to the Electrical Network")
Unification of DG Units to the Electrical Network36,99 €
Dr.B.HARI KRISHNA has worked in fault tolerance in FPGA. This book helps in re configuring faults that occur in FPGA.In this work fault tolerance in FPGA architecture is studied at three levels: structural, functional and system level. The developed algorithm can autonomously restructure itself in the presence of faulty internal processing elements (PE) for single as well as multiple PEs fault.