James E Buchanan

Signal and Power Integrity in Digital Systems

TTL, CMOS, and BICMOS
Illustrator: Buchanan, Bert D

• Gebundenes Buch

Produktbeschreibung

This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design. Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues. Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs. Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for quick reference and comparison of characteristics. It's a book every digital designer should have - engineers involved in the design of computers, peripherals, signal processors, and control and communications equipment, as well as young engineers facing their first designs using high-speed logic devices.

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Produktdetails

• Verlag: McGraw Hill LLC
• Seitenzahl: 400
• Erscheinungstermin: 19. Dezember 1995
• Englisch
• Abmessung: 236mm x 158mm x 28mm
• Gewicht: 699g
• ISBN-13: 9780070087347
• ISBN-10: 0070087342
• Artikelnr.: 22365560

Inhaltsangabe

Introduction.Advanced Schottky TTL
Advanced CMOS
and BiCMOS Logic Families.Advanced Schottky TTL
CMOS and BiCMOS Logic Circuits.Inductance and Transient Switching Currents.Power Distribution.Signal Interconnections.Transmission-Line Effects.Clock Distribution.Device
Board
and Unit Interfaces.Noise Tolerant Logic Architectures.Worst-Case Timing.System Initialization and Low-Voltage Sensing.Memory Subsystem Design.Using PALs
FIFOs
and Other LSI Devices.ASIC Application Tips.