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Multistage amplifiers with high dc gain, a wide gain-bandwidth product, a large output signal swing are widely used in analog signal processing systems. Due to the scaling in CMOS technologies, single-stage cascade amplifier is no longer suitable in low-voltage designs. Therefore, many frequency compensation topologies based on Miller pole splitting and pole-zero cancellation has been reported to stabilize the multistage amplifiers. Single-Capacitor Active- Feedback Compensation with Feedforward Stage (SCAFC-FFS) scheme is proposed for three-stage amplifiers driving small capacitive loads.…mehr

Produktbeschreibung
Multistage amplifiers with high dc gain, a wide gain-bandwidth product, a large output signal swing are widely used in analog signal processing systems. Due to the scaling in CMOS technologies, single-stage cascade amplifier is no longer suitable in low-voltage designs. Therefore, many frequency compensation topologies based on Miller pole splitting and pole-zero cancellation has been reported to stabilize the multistage amplifiers. Single-Capacitor Active- Feedback Compensation with Feedforward Stage (SCAFC-FFS) scheme is proposed for three-stage amplifiers driving small capacitive loads. With the small-value compensation capacitor, high dc gain, a wide gain-bandwidth product and increased slew-rate can also be achieved under low-power conditions. The frequency compensation scheme is investigated and verified by PSPICE.
Autorenporträt
Bhavika Chandna has completed her Masters of Technology in Signal Processing from Department of Electronics & Communication,Ambedkar Institute of Advanced Communication Technologies and Research,GGSIPU,Delhi,India.She has continued her research work and teaching as an Assistant Professor.Her interest areas are Analog Circuits, Low-Power VLSI design.