Ayan Mandal, Sunil P Khatri, Rabi Mahapatra

Source-Synchronous Networks-On-Chip

Circuit and Architectural Interconnect Modeling

• Gebundenes Buch

Produktbeschreibung

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. It provides circuit-level details of the NoC and includes architectural simulations of the NoC.

Produktdetails

• Verlag: Springer / Springer New York / Springer, Berlin
• Artikelnr. des Verlages: 86206926, 978-1-4614-9404-1
• 2014
• Seitenzahl: 160
• Erscheinungstermin: 14. November 2013
• Englisch
• Abmessung: 241mm x 160mm x 15mm
• Gewicht: 356g
• ISBN-13: 9781461494041
• ISBN-10: 1461494044
• Artikelnr.: 39398223

Inhaltsangabe

Introduction.- Clock Distribution for fast Networks-on-Chip.- Fast Network-on-Chip Design.- Fast On-Chip Data transfer using Sinusoid Signals.- Conclusion and Future Work.

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Introduction.- Clock Distribution for fast Networks-on-Chip.- Fast Network-on-Chip Design.- Fast On-Chip Data transfer using Sinusoid Signals.- Conclusion and Future Work.