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The proposed topology significantly reduces the number of dc voltage sources, switches, IGBTs, and power diodes as the number of output voltage levels increases. To synthesize maximum levels at the output voltage, the proposed topology is optimized for various objectives, such as the minimization of the number of switches, gate driver circuits and capacitors, and blocking voltage on switches. This new type of converter is suitable for high voltage and high-power applications. This multilevel inverter has ability to synthesize waveforms with better harmonics spectrum. In this project a study of SVM based 31-level inverter using less number of switches are compared to the technologies previously developed. MATLAB software is used for simulate the 31-level inverter. Also, a comparison analysis is carried out for symmetrical and asymmetrical multi-level inverter with open loop as well as closed loop using PI controller.