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The aim of Surviving the SOC Revolution: A Guide to Platform-Based Design is to provide the engineering community with a thorough understanding of the challenges involved when moving to system-on-a-chip and deliver a step-by-step methodology to get them there.
Design reuse is most effective in reducing the cost and development time when the components to be shared are close to the final implementation. On the other hand, it is not always possible or desirable to share designs at this level, since minimal variations in specification can result in different, albeit similar, implementations. However, moving higher in abstraction can eliminate the differences among designs, so that the higher level of abstraction can be shared and only a minimal amount of work needs to be carried out to achieve final implementation.
The ultimate goal is to create a library of functions and of hardware and software implementations that can be used for all new designs. It is important to have a multilevel library, since it is often the case that the lower levels that are closer to the physical implementation change because of the advances in technology, while the higher levels tend to be stable across product versions.
It is most likely that the preferred approaches to the implementation of complex embedded systems will include the following aspects: Design costs and time are likely to dominate the decision-making process for systems designers. Therefore, design reuse in all its shapes and forms will be of paramount importance. Designs have to be captured at the highest level of abstraction to be able to exploit all the degrees of freedom that are available. Next-generation systems will use a few highly complex (Moore's Law Limited) part-types, but many more energy-power-cost-efficient, medium-complexity (10M-100M) gates in 50nm technology chips, working concurrently to implement solutions to complex sensing, computing, andsignaling/actuating problems. Such chips will most likely be developed as an instance of a particular platform. That is, rather than being assembled from a collection of independently developed blocks of silicon functionality, they will be derived from a specific `family' of rnicro-architectures, possibly oriented toward a particular class of problems, that can be modified (extended or reduced) by the system developer. These platforms will be highly programmable. Both system and software reuse impose a design methodology that has to leverage existing implementations available at all levels of abstraction. £/LIST£
This book deals with the basic principles of a design methodology that addresses the concerns expressed above. The platform concept is carried throughout the book as a unifying theme to reuse. This is the first book that deals with the platform-based approach to the design of embedded systems and is a stepping stone for anyone who is interested in the real issues facing the design of complex systems-on-chip.
From the Preface by Alberto Sangiovanni-Vincentelli
Design reuse is most effective in reducing the cost and development time when the components to be shared are close to the final implementation. On the other hand, it is not always possible or desirable to share designs at this level, since minimal variations in specification can result in different, albeit similar, implementations. However, moving higher in abstraction can eliminate the differences among designs, so that the higher level of abstraction can be shared and only a minimal amount of work needs to be carried out to achieve final implementation.
The ultimate goal is to create a library of functions and of hardware and software implementations that can be used for all new designs. It is important to have a multilevel library, since it is often the case that the lower levels that are closer to the physical implementation change because of the advances in technology, while the higher levels tend to be stable across product versions.
It is most likely that the preferred approaches to the implementation of complex embedded systems will include the following aspects: Design costs and time are likely to dominate the decision-making process for systems designers. Therefore, design reuse in all its shapes and forms will be of paramount importance. Designs have to be captured at the highest level of abstraction to be able to exploit all the degrees of freedom that are available. Next-generation systems will use a few highly complex (Moore's Law Limited) part-types, but many more energy-power-cost-efficient, medium-complexity (10M-100M) gates in 50nm technology chips, working concurrently to implement solutions to complex sensing, computing, andsignaling/actuating problems. Such chips will most likely be developed as an instance of a particular platform. That is, rather than being assembled from a collection of independently developed blocks of silicon functionality, they will be derived from a specific `family' of rnicro-architectures, possibly oriented toward a particular class of problems, that can be modified (extended or reduced) by the system developer. These platforms will be highly programmable. Both system and software reuse impose a design methodology that has to leverage existing implementations available at all levels of abstraction. £/LIST£
This book deals with the basic principles of a design methodology that addresses the concerns expressed above. The platform concept is carried throughout the book as a unifying theme to reuse. This is the first book that deals with the platform-based approach to the design of embedded systems and is a stepping stone for anyone who is interested in the real issues facing the design of complex systems-on-chip.
From the Preface by Alberto Sangiovanni-Vincentelli
`This book crystallizes what may become a defining moment in the electronics industry - the shift to platform-based design. It provides the first comprehensive guidebook for those who will build, and use, the integration platforms that may soon drive the system-on-chip revolution. '
Richard Goering - Senior Technology Editor, Electronic Engineering Times
`"Surviving the SOC Revolution" takes the "Reuse Methodology Manual" top the next plateau - the `platform'. It goes beyond codifying best design practices for an `IP black', enabling true Virtual Componenets. Platform-based design articulates how to build these blocks so that they can cammunicate without modification - `Reuse without Rework'. This is the only way to survive the SOC revolution.'
Larry Rosenberg, Chair of the VSIA Technical Committee
`Coding guidelines and repositories are not sufficient to make reseuse happen. The information, processes and techniques presented in this book are critical to the implementation of a successful SOC design methodology. It covers the more critical aspects of design reuse: planning a portfolio of certified reusable components that integrate easily into an application-focused platform. IP authoring cannot happen in a vacuum.'
Janick Bergeron, VP of Technical Wisdom, Qualis Design Corporation
Richard Goering - Senior Technology Editor, Electronic Engineering Times
`"Surviving the SOC Revolution" takes the "Reuse Methodology Manual" top the next plateau - the `platform'. It goes beyond codifying best design practices for an `IP black', enabling true Virtual Componenets. Platform-based design articulates how to build these blocks so that they can cammunicate without modification - `Reuse without Rework'. This is the only way to survive the SOC revolution.'
Larry Rosenberg, Chair of the VSIA Technical Committee
`Coding guidelines and repositories are not sufficient to make reseuse happen. The information, processes and techniques presented in this book are critical to the implementation of a successful SOC design methodology. It covers the more critical aspects of design reuse: planning a portfolio of certified reusable components that integrate easily into an application-focused platform. IP authoring cannot happen in a vacuum.'
Janick Bergeron, VP of Technical Wisdom, Qualis Design Corporation
'This book crystallizes what may become a defining moment in the electronics industry - the shift to platform-based design. It provides the first comprehensive guidebook for those who will build, and use, the integration platforms that may soon drive the system-on-chip revolution.' -- Richard Goering - Senior Technology Editor, Electronic Engineering Times
'"Surviving the SOC Revolution" takes the "Reuse Methodology Manual" top the next plateau - the `platform'. It goes beyond codifying best design practices for an `IP black', enabling true Virtual Componenets. Platform-based design articulates how to build these blocks so that they can cammunicate without modification - `Reuse without Rework'. This is the only way to survive the SOC revolution.' -- Larry Rosenberg, Chair of the VSIA Technical Committee
'Coding guidelines and repositories are not sufficient to make reseuse happen. The information, processes and techniques presented in this book are critical to the implementation of a successful SOC design methodology. It covers the more critical aspects of design reuse: planning a portfolio of certified reusable components that integrate easily into an application-focused platform. IP authoring cannot happen in a vacuum.' -- Janick Bergeron, VP of Technical Wisdom, Qualis Design Corporation
'"Surviving the SOC Revolution" takes the "Reuse Methodology Manual" top the next plateau - the `platform'. It goes beyond codifying best design practices for an `IP black', enabling true Virtual Componenets. Platform-based design articulates how to build these blocks so that they can cammunicate without modification - `Reuse without Rework'. This is the only way to survive the SOC revolution.' -- Larry Rosenberg, Chair of the VSIA Technical Committee
'Coding guidelines and repositories are not sufficient to make reseuse happen. The information, processes and techniques presented in this book are critical to the implementation of a successful SOC design methodology. It covers the more critical aspects of design reuse: planning a portfolio of certified reusable components that integrate easily into an application-focused platform. IP authoring cannot happen in a vacuum.' -- Janick Bergeron, VP of Technical Wisdom, Qualis Design Corporation