In 2002, the International Conference on Computer Aided Design (ICCAD) celebrates its 20th anniversary. This book commemorates contributions made by ICCAD to the broad field of design automation during that time. The foundation of ICCAD in 1982 coincided with the growth of Large Scale Integration. The sharply increased functionality of board-level circuits led to a major demand for more powerful Electronic Design Automation (EDA) tools. At the same time, LSI grew quickly and advanced circuit integration became widely avail able. This, in turn, required new tools, using sophisticated modeling,…mehr
In 2002, the International Conference on Computer Aided Design (ICCAD) celebrates its 20th anniversary. This book commemorates contributions made by ICCAD to the broad field of design automation during that time. The foundation of ICCAD in 1982 coincided with the growth of Large Scale Integration. The sharply increased functionality of board-level circuits led to a major demand for more powerful Electronic Design Automation (EDA) tools. At the same time, LSI grew quickly and advanced circuit integration became widely avail able. This, in turn, required new tools, using sophisticated modeling, analysis and optimization algorithms in order to manage the evermore complex design processes. Not surprisingly, during the same period, a number of start-up com panies began to commercialize EDA solutions, complementing various existing in-house efforts. The overall increased interest in Design Automation (DA) re quired a new forum for the emerging community of EDA professionals; one which would be focused on the publication of high-quality research results and provide a structure for the exchange of ideas on a broad scale. Many of the original ICCAD volunteers were also members of CANDE (Computer-Aided Network Design), a workshop of the IEEE Circuits and Sys tem Society. In fact, it was at a CANDE workshop that Bill McCalla suggested the creation of a conference for the EDA professional. (Bill later developed the name).Hinweis: Dieser Artikel kann nur an eine deutsche Lieferadresse ausgeliefert werden.
I Functional Verification.- Formal Methods for Functional Verification.- Automating the Diagnosis and the Rectification of Design Errors with PRIAM.- Functional Comparison of Logic Designs for VLSI Circuits.- A Unified Framework for the Formal Verification of Sequential Circuits.- Dynamic Variable Ordering for Ordered Binary Decision Diagrams.- Verification of Large Synthesized Designs.- GRASP-A New Search Algorithm for Satisfiability.- II System Design and Analysis.- System Design and Analysis Overview.- An Efficient Microcode-Compiler for Custom DSP-Processors.- HYPER-LP: A System for Power Minimization Using Architectural Transformations.- Power Analysis of Embedded Software: First Step Towards Software Power Minimization.- A Methodology for Correct-by-Construction Latency Insensitive Design.- Exploring Performance Tradeoffs for Clustered VLIW ASIPs.- III Logic Synthesis.- Logic Synthesis Overview.- Multiple-Level Logic Optimization System.- Exact Minimization of Multiple-Valued Functions for PLA Optimization.- Improved Logic Optimization Using Global-Flow Analysis.- A Method for Concurrent Decomposition and Factorization of Boolean Expressions.- An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs.- Logic Decomposition during Technology Mapping.- IV Analog and Digital Circuit Design.- Highlights in Analog and Digital Circuit Design and Synthesis at ICCAD.- An Interactive Device Characterization and Model Development System.- TILOS: A Posynomial Programming Approach to Transistor Sizing.- SPECS2: An Integrated Circuit Timing Simulator.- Automatic Synthesis of Operational Amplifiers based on Analytic Circuit Models.- Analog Circuit Synthesis for Performance in OASYS.- Extraction of Gate-Level Models from Transistor Circuitsby Four-Valued Symbolic Analysis.- Optimization of Custom MOS Circuits by Transistor Sizing.- V Physical Simulation and Analysis.- Highlights in Physical Simulation and Analysis at ICCAD.- Nonlinear Simulation in the Frequency-Domain.- Modeling the Driving-Point Characteristic of Resistive Interconnect for Accurate Delay Estimation.- Efficient Techniques for Inductance Extraction of Complex 3-D Geometries.- Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations.- PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm.- Circuit Noise Evaluation by Padé Approximation Based Model-Reduction Techniques.- VI Physical Design.- Physical Design Overview.- Floorplan Design Using Annealing.- GOALIE: A Space-Efficient System for VLSI Artwork Analysis.- Gordian: A New Global Optimization/ Rectangle Dissection Method for Cell Placement.- Exact Zero Skew.- Efficient Network Flow Based Min-Cut Balanced Partitioning.- Rectangle-Packing-Based Module Placement.- VII Timing, Test and Manufacturing.- Timing, Test and Manufacturing Overview.- A Methodology for Worst Case Design of Integrated Circuits.- Timing Analysis using Functional Relationships.- On the Design of Robust Multiple Fault Testable CMOS Combinational Logic Circuits.- Circuit Optimization Driven by Worst-Case Distances.- Verifying Clock Schedules.- Efficient Implementation of Retiming.- VIII Industry Viewpoints.- A Cadence Perspective on ICCAD.- ICCAD and Fujitsu.- ICCAD's Impact in IBM.- Magma and ICCAD.- Designers Face Critical Challenges and Discontinuities of Analog/Mixed Signal Design and Physical Verification.- NEC and ICCAD - EDA partners in success.- The Strong Mutual Impact between Philips Research and the ICCAD.- Contributions from the "Best ofICCAD" to Synopsys.- ICCAD and Xilin.- Author Index.- Reference Index.
I Functional Verification.- Formal Methods for Functional Verification.- Automating the Diagnosis and the Rectification of Design Errors with PRIAM.- Functional Comparison of Logic Designs for VLSI Circuits.- A Unified Framework for the Formal Verification of Sequential Circuits.- Dynamic Variable Ordering for Ordered Binary Decision Diagrams.- Verification of Large Synthesized Designs.- GRASP-A New Search Algorithm for Satisfiability.- II System Design and Analysis.- System Design and Analysis Overview.- An Efficient Microcode-Compiler for Custom DSP-Processors.- HYPER-LP: A System for Power Minimization Using Architectural Transformations.- Power Analysis of Embedded Software: First Step Towards Software Power Minimization.- A Methodology for Correct-by-Construction Latency Insensitive Design.- Exploring Performance Tradeoffs for Clustered VLIW ASIPs.- III Logic Synthesis.- Logic Synthesis Overview.- Multiple-Level Logic Optimization System.- Exact Minimization of Multiple-Valued Functions for PLA Optimization.- Improved Logic Optimization Using Global-Flow Analysis.- A Method for Concurrent Decomposition and Factorization of Boolean Expressions.- An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs.- Logic Decomposition during Technology Mapping.- IV Analog and Digital Circuit Design.- Highlights in Analog and Digital Circuit Design and Synthesis at ICCAD.- An Interactive Device Characterization and Model Development System.- TILOS: A Posynomial Programming Approach to Transistor Sizing.- SPECS2: An Integrated Circuit Timing Simulator.- Automatic Synthesis of Operational Amplifiers based on Analytic Circuit Models.- Analog Circuit Synthesis for Performance in OASYS.- Extraction of Gate-Level Models from Transistor Circuitsby Four-Valued Symbolic Analysis.- Optimization of Custom MOS Circuits by Transistor Sizing.- V Physical Simulation and Analysis.- Highlights in Physical Simulation and Analysis at ICCAD.- Nonlinear Simulation in the Frequency-Domain.- Modeling the Driving-Point Characteristic of Resistive Interconnect for Accurate Delay Estimation.- Efficient Techniques for Inductance Extraction of Complex 3-D Geometries.- Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations.- PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm.- Circuit Noise Evaluation by Padé Approximation Based Model-Reduction Techniques.- VI Physical Design.- Physical Design Overview.- Floorplan Design Using Annealing.- GOALIE: A Space-Efficient System for VLSI Artwork Analysis.- Gordian: A New Global Optimization/ Rectangle Dissection Method for Cell Placement.- Exact Zero Skew.- Efficient Network Flow Based Min-Cut Balanced Partitioning.- Rectangle-Packing-Based Module Placement.- VII Timing, Test and Manufacturing.- Timing, Test and Manufacturing Overview.- A Methodology for Worst Case Design of Integrated Circuits.- Timing Analysis using Functional Relationships.- On the Design of Robust Multiple Fault Testable CMOS Combinational Logic Circuits.- Circuit Optimization Driven by Worst-Case Distances.- Verifying Clock Schedules.- Efficient Implementation of Retiming.- VIII Industry Viewpoints.- A Cadence Perspective on ICCAD.- ICCAD and Fujitsu.- ICCAD's Impact in IBM.- Magma and ICCAD.- Designers Face Critical Challenges and Discontinuities of Analog/Mixed Signal Design and Physical Verification.- NEC and ICCAD - EDA partners in success.- The Strong Mutual Impact between Philips Research and the ICCAD.- Contributions from the "Best ofICCAD" to Synopsys.- ICCAD and Xilin.- Author Index.- Reference Index.
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