A trend in DSP-based application market is the demand for new applications that have a lot of similarities to older applications but the new ones impose more challenging and special-purpose performance requirement. From design perspective, it means that the DSP core remains unchanged but more and more HW accelerators, DMAs and bus architectures need to be integrated into the chip. A key in effecting this transition is the engineering capability to make sure the design specification match the application before detailed design starts. This dissertation proposes three simulation tools working together to achieve HW/SW co-simulation and co-development. The first one models and simulates the RTOS together with the application SW. The second one is a system dataflow simulator and primarily used by the HW engineers to refine the HW specifications. The third one is a real-time simulation platform implemented on legacy DSPs. It truly enables the application SW to be developed in parallel with HW by offering the same SW development environment as if the "real HW" was available.