Weng F. Lee

Vliw Microprocessor Hardware Design

On ASIC and FPGA

• Gebundenes Buch

Produktbeschreibung

Acquire the Design Information, Methods, and SkillsNeeded to Master the New VLIW Architecture! VLIW Microprocessor Hardware Design offers you a complete guide to VLIW hardware design-providing state-of-the-art coverage of microarchitectures, RTL coding, ASIC flow, and FPGA flow of design. The book also contains a wide range of skills-building examples, all worked using Verilog, that equip you with a practical, hands-on tutorial for understanding each step in the VLIW microprocessor design process. Written by Weng Fook Lee, an internationally renowned expert in the field of microprocessor design, this cutting-edge hardware design tool presents unsurpassed coverage of the latests in VLIW microprocessing. Authoritative and comprehensive, VLIW Microprocessor Hardware Design features: Step-by-step information on the VLIW hardware design process A wealth of Verilog-based designs ASIC and FPGA implementations Expert guidance on the best-known methods for RTL coding Over 75 detailed illustrations that clarify each aspect of VLIW design Inside this Complete VLIW Microprocessor Toolkit - Introduction - Design Methodology - RTL Coding, Testbenching, and Simulation - FPGA Implementation - Testbenches and Simulation Results - Synthesis Results and Gate Level Netlist

Produktdetails

• Verlag: McGraw-Hill Professional
• Seitenzahl: 219
• Erscheinungstermin: 18. September 2007
• Englisch
• Abmessung: 231mm x 163mm x 20mm
• Gewicht: 475g
• ISBN-13: 9780071497022
• ISBN-10: 0071497021
• Artikelnr.: 22850982

Autorenporträt

Weng Fook Lee (Penang, Malaysia) is a distinguished Senior Member of Technical Staff at Emerald Systems Design Center. He is an acknowledged expert in the field of RTL coding and logic synthesis, with vast experience in microprocessor design, chipsets, ASIC and SOC devices. He holds 14 design patents and is the author of a VHDL book with Academic Press.

Inhaltsangabe

Chapter 1: Introduction Chapter 2: Design Methodology Chapter 3: RTL Coding, Testbenching, and Simulation Chapter 4: FPGA Implementation Appendix A: Testbenches and Simulation Results Appendix B: Synthesis Results and Gate Level Netlist Bibliography Index