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The performance of the deep sub-micron technology CMOS integrated circuits is limited by the wired chip-to-chip and on-chip interconnects. This work proposes two technologies for widening up this bottleneck. For the on-chip buses we propose the introduction of spatial and temporal coding techniques, which provide substantial increase of the data rate at the price of a simple coding hardware. The chip-to-chip interconnects can be implemented using wireless data transmission. The area-efficient on-chip antenna integration and the achievable chip-to-chip channel capacities are presented.

Produktbeschreibung
The performance of the deep sub-micron technology CMOS integrated circuits is limited by the wired chip-to-chip and on-chip interconnects. This work proposes two technologies for widening up this bottleneck. For the on-chip buses we propose the introduction of spatial and temporal coding techniques, which provide substantial increase of the data rate at the price of a simple coding hardware. The chip-to-chip interconnects can be implemented using wireless data transmission. The area-efficient on-chip antenna integration and the achievable chip-to-chip channel capacities are presented.
Autorenporträt
Hristomir Yordanov is born in Sofia, Bulgaria. He has graduated TU Sofia and TU Munich. He has obtained his engineering doctorate from the TU Munich in the field of high frequency engineering. Currently he works at TU Sofia.