Advanced Test Methods for SRAMs: Effective Solutions for Dynamic Fault Detection in Nanoscaled Technologies
by:
Alberto Bosio
Luigi Dilillo
Patrick Girard
Serge Pravossoudovitch
Arnaud Virazel
Modern electronics depends on nanoscaled technologies that present new challenges in terms of testing and diagnosis. Memories are particularly prone to defects since they exploit the technology limits to get the highest density. This book is an invaluable guide to the testing and diagnosis of the latest generation of SRAM, one of the most widely used type of memories. Classical methods for testing memory are designed to handle the so-called "static faults", but these test solutions are not sufficient for faults that are emerging in the latest Very Deep Sub-Micron (VDSM) technologies. These new faults, referred to as "dynamic faults", are not covered by classical algorithms and require the dedicated test and diagnosis solutions presented in this book.
by:
Alberto Bosio
Luigi Dilillo
Patrick Girard
Serge Pravossoudovitch
Arnaud Virazel
Modern electronics depends on nanoscaled technologies that present new challenges in terms of testing and diagnosis. Memories are particularly prone to defects since they exploit the technology limits to get the highest density. This book is an invaluable guide to the testing and diagnosis of the latest generation of SRAM, one of the most widely used type of memories. Classical methods for testing memory are designed to handle the so-called "static faults", but these test solutions are not sufficient for faults that are emerging in the latest Very Deep Sub-Micron (VDSM) technologies. These new faults, referred to as "dynamic faults", are not covered by classical algorithms and require the dedicated test and diagnosis solutions presented in this book.
- First book to present complete, state-of-the-art coverage of dynamic fault testing for SRAM memories;
- Presents content using a "bottom-up" approach, from the study of the electrical causes of malfunctions up to the generation of smart test strategies;
- Includes case studies covering all memory components (core-cells, address decoders, write drivers, sense amplifiers, etc.);
- Proposes an exhaustive analysis of resistive-open defects in each memory component and the resulting dynamic fault modeling.
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