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This book provides in-depth knowledge of VLSI and also the broad aspects of it by explaining its applications in different fields e.g. image processing and biomedical. The role of fault simulation algorithms is very well explained and its implementation using Verilog is the key aspect of this book.
This book provides in-depth knowledge of VLSI and also the broad aspects of it by explaining its applications in different fields e.g. image processing and biomedical. The role of fault simulation algorithms is very well explained and its implementation using Verilog is the key aspect of this book.
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Suman Lata Tripathi is associated with Lovely Professional University, Phagwara, Punjab, as Professor with more than seventeen years of experience in academics. Her area of expertise includes microelectronics device modeling and characterization, low power VLSI circuit design, VLSI design of testing and advance FET design for IOT and biomedical applications etc. Sobhit Saxena is an Associate Professor at Lovely Professional University University, Phagwara, Punjab. His area of expertise includes nanomaterial synthesis and characterization, electrochemical analysis and modeling and simulation of CNT based interconnects for VLSI circuits. S. K. Mohapatra is working as Assistant Professor, in School of Electronics Engineering, Kalinga Institute of Industrial Technology, Bhubaneswar. His research interests include Modeling and Simulation of Nanoscale Devices and its application in IoT. Energy efficient Wireless Sensor Networking, Adhoc Networks, Cellular Communications, Metamaterial absorbers in THz application, UWB-MIMO Antenna, Reconfigurable Antenna, Performance enhancement for high frequency.
Inhaltsangabe
1. Digital Design with Programmable Logic Devices. 2. Review of Digital Electronics Design. 3 Verilog HDL for Digital and Analog Design. 4. Introduction to Hardware Description Languages. 5. Introduction to Hardware Description Languages (HDLs). 6. Emerging Trends in Nanoscale Semiconductor Devices. 7. Design Challenges and Solutions in CMOS-Based FET. 8. Analytical Design of FET-Based Biosensors. 9. Low-Power FET-Based Bio-sensors. 10. Nanowire Array-Based Gate-All-Around MOSFET for Next-Generation Memory Devices. 11. Design of 7T SRAM Cell Using FinFET Technology. 12. Performance Analysis of AlGaN/GaN Heterostructure Field Effect Transistor (HFET). 13. Synthesis of Polymer-Based Composites for Application in Field-Effect Transistors. 14. Power Efficiency Analysis of Low-Power Circuit Design Techniques in 90-nm CMOS technology. 15. Macromodeling and Synthesis of Analog Circuits. 16. Performance-Linked Phase-Locked Loop Architectures: Recent Developments. 17. A Review of Analog-to-Digital and Digital-to-Analog Converters for Smart Antenna Application. 18. Active Inductor-Based VCO for Wireless Communication. 19. Fault Simulation Algorithms: Verilog Implementation. 20. Hardware Protection through Logic Obfuscation.
1. Digital Design with Programmable Logic Devices. 2. Review of Digital Electronics Design. 3 Verilog HDL for Digital and Analog Design. 4. Introduction to Hardware Description Languages. 5. Introduction to Hardware Description Languages (HDLs). 6. Emerging Trends in Nanoscale Semiconductor Devices. 7. Design Challenges and Solutions in CMOS-Based FET. 8. Analytical Design of FET-Based Biosensors. 9. Low-Power FET-Based Bio-sensors. 10. Nanowire Array-Based Gate-All-Around MOSFET for Next-Generation Memory Devices. 11. Design of 7T SRAM Cell Using FinFET Technology. 12. Performance Analysis of AlGaN/GaN Heterostructure Field Effect Transistor (HFET). 13. Synthesis of Polymer-Based Composites for Application in Field-Effect Transistors. 14. Power Efficiency Analysis of Low-Power Circuit Design Techniques in 90-nm CMOS technology. 15. Macromodeling and Synthesis of Analog Circuits. 16. Performance-Linked Phase-Locked Loop Architectures: Recent Developments. 17. A Review of Analog-to-Digital and Digital-to-Analog Converters for Smart Antenna Application. 18. Active Inductor-Based VCO for Wireless Communication. 19. Fault Simulation Algorithms: Verilog Implementation. 20. Hardware Protection through Logic Obfuscation.
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