Beyond-CMOS Nanodevices 2 (eBook, ePUB)

Redaktion: Balestra, Francis

• Format: ePub

Produktbeschreibung

This book offers a comprehensive review of the state-of-the-art in innovative Beyond-CMOS nanodevices for developing novel functionalities, logic and memories dedicated to researchers, engineers and students. The book will particularly focus on the interest of nanostructures and nanodevices (nanowires, small slope switches, 2D layers, nanostructured materials, etc.) for advanced More than Moore (RF-nanosensors-energy harvesters, on-chip electronic cooling, etc.) and Beyond-CMOS logic and memories applications.

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Produktdetails

• Verlag: John Wiley & Sons
• Seitenzahl: 320
• Erscheinungstermin: 3. Juni 2014
• Englisch
• ISBN-13: 9781118985113
• Artikelnr.: 41008520

Autorenporträt

Francis Balestra received the M.S. and Ph.D. degrees in electronics from the Institut Polytechnique, Grenoble, France, in 1982 and 1985, respectively.  F. Balestra has been Director of IMEP (Institute of Microelectronics, Electromagnetism and Photonics) and previously from LPCS for a total of 10 years. He is now Director of the Sinano Institute (22 members from 12 European countries) devoted to the coordination of the research activities of the European academic community in the nanoelectronic field. He has coordinated European, National and Regional projects. Within FP6 and FP7, he coordinated the Sinano and Nanosil Networks of Excellence (NoE) that have represented unprecedented collaborations in Europe in the field of nanoelectronics, and is presently coordinating a European NoE of the 7th Framework Programme dealing with the study of innovative nanostructures for adding functionalities to CMOS for future nanosystems. He is a member of the European Academy of Sciences, of the Advisory Committee of the Chinese Journal of Semiconductors and Chinese Physics B and received the Blondel Medal (French SEE) in 2001. He is also member of the European ENIAC Scientific Community Council and several ENIAC/AENEAS Working Groups. Francis Balestra has coauthored over 130 publications in international scientific journals, 240 communications at international conferences (more than 70 invited papers and review articles), and 20 books or chapters.

Inhaltsangabe

ACKNOWLEDGMENTS ix
GENERAL INTRODUCTION xi
Francis BALESTRA
INTRODUCTION TO VOLUME 2: SILICON NANOWIRE BIO-CHEMICAL SENSORS 1
Francis BALESTRA
CHAPTER 1. SMALL SLOPE SWITCHES 5
Adrian M. IONESCU and Francis BALESTRA, Kathy BOUCART, Giovanni SALVATORE
and Alexandru RUSU
1.1. Introduction 5
1.2. Tunnel FETs 6
1.3. Ferroelectric gate FET 14
1.4. Bibliography 21
CHAPTER 2. NANOWIRE DEVICES 25
Gérard GHIBAUDO, Sylvain BARRAUD, Mikaël CASSÉ, Xin Peng WANG, Guo Qiang
LO, Dim-Lee KWONG, Marco PALA and Zheng FANG
2.1. Introduction 25
2.2. NW for logic CMOS devices 26
2.2.1. NW fabrication and technology 26
2.2.2. Quantum simulation of NWs 37
2.2.3. Electrical characterization of NWs 49
2.3. Nano-CMOS ultimate memories 66
2.3.1. Overview of memory  66
2.3.2. NW application in the evolutive solution path 67
2.3.3. NW technology along the disruptive solution path 73
2.4. Conclusions 81
2.5. Acknowledgments    82
2.6. Bibliography 82
CHAPTER 3. GRAPHENE AND 2D LAYER DEVICES FOR MORE MOORE AND MORE-THAN-MOORE
APPLICATIONS 97
Max C. LEMME
3.1. Introduction 97
3.2. Graphene 98
3.2.1. Graphene fabrication   98
3.2.2. Macroscopic graphene field effect transistors 101
3.2.3. Graphene nanoribbon transistors 103
3.2.4. Bilayer graphene and substrate effects   105
3.2.5. RF transistors 106
3.2.6. Alternative graphene switches 107
3.3. 2D materials beyond graphene 108
3.4. Conclusions 109
3.5. Acknowledgments    110
3.6. Bibliography 110
CHAPTER 4. NANOELECTROMECHANICAL SWITCHES 117
Hervé FANET
4.1. Context   117
4.2. Nanorelay principles 118
4.2.1. The electrostatic actuation 119
4.2.2. The piezoelectrical actuation 120
4.2.3. The magnetic actuation  120
4.2.4. The thermal actuation 120
4.3. Electrostatic nanorelay modeling and optimization  121
4.3.1. Dynamic modeling 121
4.3.2. Quasi-static modeling 124
4.4. Technological challenges for NEMS computing 127
4.4.1. Low voltage operation 127
4.4.2. Reliability of contact technology 128
4.5. NEMS-based architectures 129
4.5.1. Conventional architectures 129
4.5.2. Adiabatic architectures 130
4.6. Conclusions 131
4.7. Bibliography 132
LIST OF AUTHORS  133
INDEX 135