Harry Bleeker, Peter van den Eijnden, Frans de Jong

Boundary-Scan Test (eBook, PDF)

A Practical Approach

• Format: PDF

Produktbeschreibung

The ever-increasing miniaturization of digital electronic components is hampering the conventional testing of Printed Circuit Boards (PCBs) by means of bed-of-nails fixtures. Basically this is caused by the very high scale of integration of ICs, through which packages with hundreds of pins at very small pitches of down to a fraction of a millimetre, have become available. As a consequence the trace distances between the copper tracks on a printed circuit board cmne down to the same value. Not only the required small physical dimensions of the test nails have made conventional testing unfeasible, but also the complexity to provide test signals for the many hundreds of test nails has grown out of limits. Therefore a new board test methodology had to be invented. Following the evolution in the IC test technology. Boundary-Scan testing hm; become the new approach to PCB testing. By taking precautions in the design of the IC (design for testability), testing on PCB level can be simplified 10 a great extent. This condition has been essential for the success of the introduction of Boundary-Sc,m Test (BST) at board level.

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Produktdetails

• Verlag: Springer US
• Seitenzahl: 225
• Erscheinungstermin: 28. Juni 2011
• Englisch
• ISBN-13: 9781461531326
• Artikelnr.: 43993384

Inhaltsangabe

1 PCB Testing.- Miniaturization in Electronics.- Road Blocks for Conventional PCB Test Methods.- The Solution for PCB Testing.- 2 The Boundary-Scan Test Standard.- The BST Architecture.- Test Access Port.- Tap Controller.- The Instruction Register.- Test Data Registers.- Instructions.- Documentation Requirements.- 3 Hardware Test Innovations.- Provisions at Board Level.- System-Level Test Support.- On Chip Provisions.- 4 BST Design Languages.- BSDL Description.- BSDL Design Example.- A Boundary-Scan Register Compiler.- Test Specification Languages.- 5 PCB Test Strategy Backgrounds.- Testing The Integrity of the BST Chain.- PCB Production Faults.- Test Algorithms.- Diagnostics.- Cluster Testing.- Architecture of a Boundary-Scan Test Flow.- 6 Management Aspects.- Coming to the Standard.- Management Role.- Benefits of Boundary-Scan Test.- References.

Rezensionen

`I recommend this book for the following audience in the field of digital design: advanced undergraduate and graduate students, who are interested in testing digital systems and are looking for an up-to-date course in design for testability; practising engineers interested in incorporating modern techniques for improving testability into their designs; and design managers who are looking for ways to improve factory profitability and return on investments. The book will appeal especially to practising VLSI and ASIC designers, and I recommend it to them highly.'
Engineering Applications of Artifical Intelligence, 7:1
' In summary, this text is a useful and readable description of the application and use of boundary-scan. It is also a useful addition to previous boundary-scan publication, and complementary to more recent. I thoroughly recommend this book. ' Microprocessors and Microsystems 17:5 1993

`I recommend this book for the following audience in the field of digital design: advanced undergraduate and graduate students, who are interested in testing digital systems and are looking for an up-to-date course in design for testability; practising engineers interested in incorporating modern techniques for improving testability into their designs; and design managers who are looking for ways to improve factory profitability and return on investments. The book will appeal especially to practising VLSI and ASIC designers, and I recommend it to them highly.'
Engineering Applications of Artifical Intelligence, 7:1
' In summary, this text is a useful and readable description of the application and use of boundary-scan. It is also a useful addition to previous boundary-scan publication, and complementary to more recent. I thoroughly recommend this book. ' Microprocessors and Microsystems 17:5 1993