Contents
- Verification of Systems
- Introduction to Formal Verification of SystemC Models
- Symbolic Model Checking with Partial Order Reduction
- Efficient Symbolic State Matching using State Subsumption
- Heuristic Approaches for Symbolic State Matching
- Evaluation of Proposed Techniques
Target Groups
- Lecturers and Students of Computer Sciences and Electrical Engineering
- Hardware Designers and Verification Engineers using SystemC
The Author
Vladimir Herdt is working as Research Assistant in the Group of Computer Architecture at the University of Bremen, where he is pursuing his PhD degree.
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