Topics are developed in the context of a wide range of dynamic and static verification approaches including stimulation, emulation and formal methods. The goal is to show how constraints, or assertions, can be used toward automating the generation of testbenches, resulting in a seamless verifcation flow. Topics such as verification coverage, and connection with assertion-based verification are also covered.
Constraint-Based Verification is written for verification engineers, as well as researchers - it explains both methodological and technical issues. Particular stress is given to the latest advances in functional verification.
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