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This book provides readers with a comprehensive overview of the state-of-the-art in optical contactless probing approaches, in order to fill a gap in the literature on VLSI Testing. The author highlights the inherent difficulties encountered with the mechanical probe and testability design approaches for functional and internal fault testing and shows how contactless testing might resolve many of the challenges associated with conventional mechanical wafer testing. The techniques described in this book address the increasing demands for internal access of the logic state of a node within a…mehr

Produktbeschreibung
This book provides readers with a comprehensive overview of the state-of-the-art in optical contactless probing approaches, in order to fill a gap in the literature on VLSI Testing. The author highlights the inherent difficulties encountered with the mechanical probe and testability design approaches for functional and internal fault testing and shows how contactless testing might resolve many of the challenges associated with conventional mechanical wafer testing. The techniques described in this book address the increasing demands for internal access of the logic state of a node within a chip under test:


  • Provides a single-source reference on contactless probing approaches for VLSI testing and diagnostic measurement
  • Introduces readers to various optical contactless testing techniques, such as Electro-Optic Probing, Charge Density Probe, and Photo-emissive Probe
  • Discusses the applicability and adaptability of each technique, based on multilayer metallization, wafer level techniques, and invasiveness
  • Provides a comparison among various contactless testing techniques
  • Describes a variety of industrial applications of contactless VLSI testing



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Autorenporträt
Dr. Selahattin Sayil is a Professor in the Philip M. Drayer Department of Electrical Engineering at Lamar University. His research focuses on VLSI Testing, Contactless Testing, Radiation effects modeling and hardening at the circuit level, Reliability analysis of low power designs, and Interconnect modeling and noise prediction.