This book shows how to incorporate Simulink® and Stateflow® into the process of modern digital design. It describes the tools and concepts for simulating interactions, testing systems, and detecting design faults-allowing for better results in the design flow process. The book covers fault modeling and simulation, VLSI testability analysis, the ATPG process, deterministic algorithms, timing verification, and system and embedded core testing. It begins by introducing the Simulink and Stateflow tools, followed by descriptions of test development and simulation processes. The author also provides examples of Simulink modeling and simulation for the latest design-for-test fields.
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