- Provides a detailed background on the state of error control methods for on-chip interconnects;
- Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links;
- Examines energy-efficient techniques for integrating multiple error control methods in on-chip interconnects;
- Introduces various design techniques to tradeoff the reliability and energy consumption of on-chip interconnects, including implementation of low link swing voltage and dynamic voltage scaling with error control codes, combination of Hamming product codes with type-II hybrid ARQ, and configurable error control codes implementation.
Dieser Download kann aus rechtlichen Gründen nur mit Rechnungsadresse in A, B, BG, CY, CZ, D, DK, EW, E, FIN, F, GR, HR, H, IRL, I, LT, L, LR, M, NL, PL, P, R, S, SLO, SK ausgeliefert werden.