David M. Russinoff

Formal Verification of Floating-Point Hardware Design (eBook, PDF)

A Mathematical Approach

• Format: PDF

Produktbeschreibung

This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies.

The book consists of five parts, the first two of which present a rigorous exposition of the general theory based on the first principles of arithmetic. Part I covers bit vectors and the bit manipulation primitives, integer and fixed-point encodings, and bit-wise logical operations. Part II addresses the properties of floating-point numbers, the formats in which they are encoded as bit vectors, and the various modes of floating-point rounding. In Part III, the theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, Part IV contains high-level specifications of correctness of the basic arithmetic instructions of several major industry-standard floating-point architectures, including all details pertaining to the handling of exceptional conditions. Part V illustrates the methodology, applying the preceding theory to the comprehensive verification of a state-of-the-art commercial floating-point unit.

All of these results have been formalized in the logic of the ACL2 theorem prover and mechanically checked to ensure their correctness. They are presented here, however, in simple conventional mathematical notation. The book presupposes no familiarity with ACL2, logic design, or any mathematics beyond basic high school algebra. It will be of interest to verification engineers as well as arithmetic circuit designers who appreciate the value of a rigorous approach to their art, and is suitable as a graduate text in computer arithmetic.

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Produktdetails

• Verlag: Springer Nature Switzerland
• Seitenzahl: 382
• Erscheinungstermin: 13. Oktober 2018
• Englisch
• ISBN-13: 9783319955131
• Artikelnr.: 56825106

Autorenporträt

David M. Russinoff is Principal Engineer at Arm Holdings. He holds a bachelor's degree from the Massachusetts Institute of Technology and a doctorate from New York University, both in mathematics, and a master's in computer sciences from the University of Texas at Austin. He has spent twenty-five years developing mathematical methods of hardware verification, with an emphasis on interactive theorem proving, and applying them in the analysis of commercial designs, especially arithmetic circuits.

Inhaltsangabe

Part I - Register-Transfer Logic.- Basic Arithmetic Functions.- Bit Vectors.- Logical Operations.- Part II - Floating-Point Arithmetic.- Floating-Point Numbers.- Floating-Point Formats.- Rounding.- IEEE-Compliant Square Root.- Part III - Implementation of Elementary Operations.- Addition.- Multiplication.- SRT Division and Square Root.- FMA-Based Division.- Part IV - Comparative Architectures: SSE, x87, and Arm.- SSE Floating-Point Instructions.- x87 Instructions.- Arm Floating-Point.- Instructions.- Part V - Formal Verification of RTL Designs.- The RAC Modeling Language.- Double-Precision Multiplication and Scaling.- Double-Precision Addition and FMA.- Multi-Precision Radix-8 SRT Division.- 64-bit Integer Division.- Multi-Precision Radix-4 SRT Square Root.- Multi-Precision Radix-2 SRT Division.- Fused Multiply-Add of a Graphics Processor.